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Revert "Re-commit r357452: SimplifyCFG SinkCommonCodeFromPredecessors: Also sink function calls without used results (PR41259)"
This reverts r357452 (git commit 21eb771). This was causing strange optimization-related test failures on an internal test. Will followup with more details offline. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360086 91177308-0d34-0410-b5e6-96231b3b80d8
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-126
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6 files changed

+81
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lib/Transforms/Utils/SimplifyCFG.cpp

Lines changed: 14 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1438,10 +1438,9 @@ static bool HoistThenElseCodeToIf(BranchInst *BI,
14381438
static bool canSinkInstructions(
14391439
ArrayRef<Instruction *> Insts,
14401440
DenseMap<Instruction *, SmallVector<Value *, 4>> &PHIOperands) {
1441-
// Prune out obviously bad instructions to move. Each instruction must have
1442-
// exactly zero or one use, and we check later that use is by a single, common
1443-
// PHI instruction in the successor.
1444-
bool HasUse = !Insts.front()->user_empty();
1441+
// Prune out obviously bad instructions to move. Any non-store instruction
1442+
// must have exactly one use, and we check later that use is by a single,
1443+
// common PHI instruction in the successor.
14451444
for (auto *I : Insts) {
14461445
// These instructions may change or break semantics if moved.
14471446
if (isa<PHINode>(I) || I->isEHPad() || isa<AllocaInst>(I) ||
@@ -1455,10 +1454,9 @@ static bool canSinkInstructions(
14551454
if (C->isInlineAsm())
14561455
return false;
14571456

1458-
// Each instruction must have zero or one use.
1459-
if (HasUse && !I->hasOneUse())
1460-
return false;
1461-
if (!HasUse && !I->user_empty())
1457+
// Everything must have only one use too, apart from stores which
1458+
// have no uses.
1459+
if (!isa<StoreInst>(I) && !I->hasOneUse())
14621460
return false;
14631461
}
14641462

@@ -1467,11 +1465,11 @@ static bool canSinkInstructions(
14671465
if (!I->isSameOperationAs(I0))
14681466
return false;
14691467

1470-
// All instructions in Insts are known to be the same opcode. If they have a
1471-
// use, check that the only user is a PHI or in the same block as the
1472-
// instruction, because if a user is in the same block as an instruction we're
1473-
// contemplating sinking, it must already be determined to be sinkable.
1474-
if (HasUse) {
1468+
// All instructions in Insts are known to be the same opcode. If they aren't
1469+
// stores, check the only user of each is a PHI or in the same block as the
1470+
// instruction, because if a user is in the same block as an instruction
1471+
// we're contemplating sinking, it must already be determined to be sinkable.
1472+
if (!isa<StoreInst>(I0)) {
14751473
auto *PNUse = dyn_cast<PHINode>(*I0->user_begin());
14761474
auto *Succ = I0->getParent()->getTerminator()->getSuccessor(0);
14771475
if (!all_of(Insts, [&PNUse,&Succ](const Instruction *I) -> bool {
@@ -1549,7 +1547,7 @@ static bool sinkLastInstruction(ArrayRef<BasicBlock*> Blocks) {
15491547
// it is slightly over-aggressive - it gets confused by commutative instructions
15501548
// so double-check it here.
15511549
Instruction *I0 = Insts.front();
1552-
if (!I0->user_empty()) {
1550+
if (!isa<StoreInst>(I0)) {
15531551
auto *PNUse = dyn_cast<PHINode>(*I0->user_begin());
15541552
if (!all_of(Insts, [&PNUse](const Instruction *I) -> bool {
15551553
auto *U = cast<Instruction>(*I->user_begin());
@@ -1607,10 +1605,11 @@ static bool sinkLastInstruction(ArrayRef<BasicBlock*> Blocks) {
16071605
I0->andIRFlags(I);
16081606
}
16091607

1610-
if (!I0->user_empty()) {
1608+
if (!isa<StoreInst>(I0)) {
16111609
// canSinkLastInstruction checked that all instructions were used by
16121610
// one and only one PHI node. Find that now, RAUW it to our common
16131611
// instruction and nuke it.
1612+
assert(I0->hasOneUse());
16141613
auto *PN = cast<PHINode>(*I0->user_begin());
16151614
PN->replaceAllUsesWith(I0);
16161615
PN->eraseFromParent();

test/CodeGen/AArch64/max-jump-table.ll

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
; RUN: llc %s -O2 -print-machineinstrs -mtriple=aarch64-linux-gnu -jump-table-density=40 -mcpu=exynos-m1 -o /dev/null 2> %t; FileCheck %s --check-prefixes=CHECK,CHECKM1 < %t
55
; RUN: llc %s -O2 -print-machineinstrs -mtriple=aarch64-linux-gnu -jump-table-density=40 -mcpu=exynos-m3 -o /dev/null 2> %t; FileCheck %s --check-prefixes=CHECK,CHECKM3 < %t
66

7-
declare void @ext(i32, i32)
7+
declare void @ext(i32)
88

99
define i32 @jt1(i32 %a, i32 %b) {
1010
entry:
@@ -45,23 +45,23 @@ entry:
4545
; CHECKM3-NEXT: %jump-table.0:
4646
; CHECKM3-NOT: %jump-table.1:
4747

48-
bb1: tail call void @ext(i32 1, i32 0) br label %return
49-
bb2: tail call void @ext(i32 2, i32 2) br label %return
50-
bb3: tail call void @ext(i32 3, i32 4) br label %return
51-
bb4: tail call void @ext(i32 4, i32 6) br label %return
52-
bb5: tail call void @ext(i32 5, i32 8) br label %return
53-
bb6: tail call void @ext(i32 6, i32 10) br label %return
54-
bb7: tail call void @ext(i32 7, i32 12) br label %return
55-
bb8: tail call void @ext(i32 8, i32 14) br label %return
56-
bb9: tail call void @ext(i32 9, i32 16) br label %return
57-
bb10: tail call void @ext(i32 1, i32 18) br label %return
58-
bb11: tail call void @ext(i32 2, i32 20) br label %return
59-
bb12: tail call void @ext(i32 3, i32 22) br label %return
60-
bb13: tail call void @ext(i32 4, i32 24) br label %return
61-
bb14: tail call void @ext(i32 5, i32 26) br label %return
62-
bb15: tail call void @ext(i32 6, i32 28) br label %return
63-
bb16: tail call void @ext(i32 7, i32 30) br label %return
64-
bb17: tail call void @ext(i32 8, i32 32) br label %return
48+
bb1: tail call void @ext(i32 0) br label %return
49+
bb2: tail call void @ext(i32 2) br label %return
50+
bb3: tail call void @ext(i32 4) br label %return
51+
bb4: tail call void @ext(i32 6) br label %return
52+
bb5: tail call void @ext(i32 8) br label %return
53+
bb6: tail call void @ext(i32 10) br label %return
54+
bb7: tail call void @ext(i32 12) br label %return
55+
bb8: tail call void @ext(i32 14) br label %return
56+
bb9: tail call void @ext(i32 16) br label %return
57+
bb10: tail call void @ext(i32 18) br label %return
58+
bb11: tail call void @ext(i32 20) br label %return
59+
bb12: tail call void @ext(i32 22) br label %return
60+
bb13: tail call void @ext(i32 24) br label %return
61+
bb14: tail call void @ext(i32 26) br label %return
62+
bb15: tail call void @ext(i32 28) br label %return
63+
bb16: tail call void @ext(i32 30) br label %return
64+
bb17: tail call void @ext(i32 32) br label %return
6565

6666
return: ret i32 %b
6767
}
@@ -91,11 +91,11 @@ entry:
9191
; CHECKM3-NOT: %jump-table.1
9292
; CHECK-DAG: End machine code for function jt2.
9393

94-
bb1: tail call void @ext(i32 6, i32 1) br label %return
95-
bb2: tail call void @ext(i32 5, i32 2) br label %return
96-
bb3: tail call void @ext(i32 4, i32 3) br label %return
97-
bb4: tail call void @ext(i32 3, i32 4) br label %return
98-
bb5: tail call void @ext(i32 2, i32 5) br label %return
99-
bb6: tail call void @ext(i32 1, i32 6) br label %return
94+
bb1: tail call void @ext(i32 1) br label %return
95+
bb2: tail call void @ext(i32 2) br label %return
96+
bb3: tail call void @ext(i32 3) br label %return
97+
bb4: tail call void @ext(i32 4) br label %return
98+
bb5: tail call void @ext(i32 5) br label %return
99+
bb6: tail call void @ext(i32 6) br label %return
100100
return: ret void
101101
}

test/CodeGen/AArch64/min-jump-table.ll

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
; RUN: llc %s -O2 -print-machineinstrs -mtriple=aarch64-linux-gnu -jump-table-density=40 -min-jump-table-entries=4 -o /dev/null 2> %t; FileCheck %s --check-prefixes=CHECK,CHECK4 < %t
33
; RUN: llc %s -O2 -print-machineinstrs -mtriple=aarch64-linux-gnu -jump-table-density=40 -min-jump-table-entries=8 -o /dev/null 2> %t; FileCheck %s --check-prefixes=CHECK,CHECK8 < %t
44

5-
declare void @ext(i32, i32)
5+
declare void @ext(i32)
66

77
define i32 @jt2(i32 %a, i32 %b) {
88
entry:
@@ -17,8 +17,8 @@ entry:
1717
; CHECK4-NOT: {{^}}Jump Tables:
1818
; CHECK8-NOT: {{^}}Jump Tables:
1919

20-
bb1: tail call void @ext(i32 1, i32 0) br label %return
21-
bb2: tail call void @ext(i32 2, i32 2) br label %return
20+
bb1: tail call void @ext(i32 0) br label %return
21+
bb2: tail call void @ext(i32 2) br label %return
2222

2323
return: ret i32 %b
2424
}
@@ -40,10 +40,10 @@ entry:
4040
; CHECK4-NOT: %jump-table.1:
4141
; CHECK8-NOT: {{^}}Jump Tables:
4242

43-
bb1: tail call void @ext(i32 1, i32 0) br label %return
44-
bb2: tail call void @ext(i32 3, i32 2) br label %return
45-
bb3: tail call void @ext(i32 4, i32 4) br label %return
46-
bb4: tail call void @ext(i32 5, i32 6) br label %return
43+
bb1: tail call void @ext(i32 0) br label %return
44+
bb2: tail call void @ext(i32 2) br label %return
45+
bb3: tail call void @ext(i32 4) br label %return
46+
bb4: tail call void @ext(i32 6) br label %return
4747

4848
return: ret i32 %b
4949
}
@@ -65,14 +65,14 @@ entry:
6565
; CHECK-NEXT: %jump-table.0:
6666
; CHECK-NOT: %jump-table.1:
6767

68-
bb1: tail call void @ext(i32 1, i32 0) br label %return
69-
bb2: tail call void @ext(i32 2, i32 2) br label %return
70-
bb3: tail call void @ext(i32 3, i32 4) br label %return
71-
bb4: tail call void @ext(i32 4, i32 6) br label %return
72-
bb5: tail call void @ext(i32 5, i32 8) br label %return
73-
bb6: tail call void @ext(i32 6, i32 10) br label %return
74-
bb7: tail call void @ext(i32 7, i32 12) br label %return
75-
bb8: tail call void @ext(i32 8, i32 14) br label %return
68+
bb1: tail call void @ext(i32 0) br label %return
69+
bb2: tail call void @ext(i32 2) br label %return
70+
bb3: tail call void @ext(i32 4) br label %return
71+
bb4: tail call void @ext(i32 6) br label %return
72+
bb5: tail call void @ext(i32 8) br label %return
73+
bb6: tail call void @ext(i32 10) br label %return
74+
bb7: tail call void @ext(i32 12) br label %return
75+
bb8: tail call void @ext(i32 14) br label %return
7676

7777
return: ret i32 %b
7878
}

test/CodeGen/AArch64/win64-jumptable.ll

Lines changed: 26 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -10,43 +10,43 @@ entry:
1010
i32 3, label %sw.bb3
1111
]
1212

13-
sw.bb:
14-
tail call void @g(i32 0, i32 4)
13+
sw.bb: ; preds = %entry
14+
tail call void @g(i32 0) #2
1515
br label %sw.epilog
1616

17-
sw.bb1:
18-
tail call void @g(i32 1, i32 5)
17+
sw.bb1: ; preds = %entry
18+
tail call void @g(i32 1) #2
1919
br label %sw.epilog
2020

21-
sw.bb2:
22-
tail call void @g(i32 2, i32 6)
21+
sw.bb2: ; preds = %entry
22+
tail call void @g(i32 2) #2
2323
br label %sw.epilog
2424

25-
sw.bb3:
26-
tail call void @g(i32 3, i32 7)
25+
sw.bb3: ; preds = %entry
26+
tail call void @g(i32 3) #2
2727
br label %sw.epilog
2828

29-
sw.epilog:
30-
tail call void @g(i32 10, i32 8)
29+
sw.epilog: ; preds = %entry, %sw.bb3, %sw.bb2, %sw.bb1, %sw.bb
30+
tail call void @g(i32 10) #2
3131
ret void
3232
}
3333

34-
declare void @g(i32, i32)
35-
36-
; CHECK: .text
37-
; CHECK: f:
38-
; CHECK: .seh_proc f
39-
; CHECK: b g
40-
; CHECK-NEXT: .p2align 2
41-
; CHECK-NEXT: .LJTI0_0:
42-
; CHECK: .word .LBB0_2-.LJTI0_0
43-
; CHECK: .word .LBB0_3-.LJTI0_0
44-
; CHECK: .word .LBB0_4-.LJTI0_0
45-
; CHECK: .word .LBB0_5-.LJTI0_0
46-
; CHECK: .section .xdata,"dr"
47-
; CHECK: .seh_handlerdata
48-
; CHECK: .text
49-
; CHECK: .seh_endproc
34+
declare void @g(i32)
35+
36+
; CHECK: .text
37+
; CHECK: f:
38+
; CHECK: .seh_proc f
39+
; CHECK: b g
40+
; CHECK-NEXT: .p2align 2
41+
; CHECK-NEXT: .LJTI0_0:
42+
; CHECK: .word .LBB0_2-.LJTI0_0
43+
; CHECK: .word .LBB0_3-.LJTI0_0
44+
; CHECK: .word .LBB0_4-.LJTI0_0
45+
; CHECK: .word .LBB0_5-.LJTI0_0
46+
; CHECK: .section .xdata,"dr"
47+
; CHECK: .seh_handlerdata
48+
; CHECK: .text
49+
; CHECK: .seh_endproc
5050

5151
; Check that we can emit an object file with correct unwind info.
5252
; UNWIND: FunctionLength: {{[1-9][0-9]*}}

test/CodeGen/ARM/cmpxchg-idioms.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,14 +20,14 @@ define i32 @test_return(i32* %p, i32 %oldval, i32 %newval) {
2020
; CHECK: [[FAILED]]:
2121
; CHECK-NOT: cmp {{r[0-9]+}}, {{r[0-9]+}}
2222
; CHECK: clrex
23-
; CHECK: movs r0, #0
2423
; CHECK: dmb ish
24+
; CHECK: movs r0, #0
2525
; CHECK: bx lr
2626

2727
; CHECK: [[SUCCESS]]:
2828
; CHECK-NOT: cmp {{r[0-9]+}}, {{r[0-9]+}}
29-
; CHECK: movs r0, #1
3029
; CHECK: dmb ish
30+
; CHECK: movs r0, #1
3131
; CHECK: bx lr
3232

3333
%pair = cmpxchg i32* %p, i32 %oldval, i32 %newval seq_cst seq_cst

test/Transforms/SimplifyCFG/sink-common-code.ll

Lines changed: 0 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -843,50 +843,6 @@ if.end:
843843
; CHECK: insertvalue
844844
; CHECK-NOT: insertvalue
845845

846-
847-
declare void @baz(i32)
848-
849-
define void @test_sink_void_calls(i32 %x) {
850-
entry:
851-
switch i32 %x, label %default [
852-
i32 0, label %bb0
853-
i32 1, label %bb1
854-
i32 2, label %bb2
855-
i32 3, label %bb3
856-
i32 4, label %bb4
857-
]
858-
bb0:
859-
call void @baz(i32 12)
860-
br label %return
861-
bb1:
862-
call void @baz(i32 34)
863-
br label %return
864-
bb2:
865-
call void @baz(i32 56)
866-
br label %return
867-
bb3:
868-
call void @baz(i32 78)
869-
br label %return
870-
bb4:
871-
call void @baz(i32 90)
872-
br label %return
873-
default:
874-
unreachable
875-
return:
876-
ret void
877-
878-
; Check that the calls get sunk to the return block.
879-
; We would previously not sink calls without uses, see PR41259.
880-
; CHECK-LABEL: @test_sink_void_calls
881-
; CHECK-NOT: call
882-
; CHECK-LABEL: return:
883-
; CHECK: phi
884-
; CHECK: call
885-
; CHECK-NOT: call
886-
; CHECK: ret
887-
}
888-
889-
890846
; CHECK: ![[$TBAA]] = !{![[TYPE:[0-9]]], ![[TYPE]], i64 0}
891847
; CHECK: ![[TYPE]] = !{!"float", ![[TEXT:[0-9]]]}
892848
; CHECK: ![[TEXT]] = !{!"an example type tree"}

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