[X86] Ensure that bit reversals of byte vectors are properly lowered on pure GFNI targets #148304

TDecking · 2025-07-11T21:50:42Z

When GFNI is present, custom bit reversal lowerings for scalar integers become active. They work by swapping the bytes in the scalar value and then reversing bits in a vector of bytes. However, the custom bit reversal lowering for a vector of bytes is disabled if GFNI is present in isolation, resulting messed up code.

github-actions · 2025-07-11T21:51:05Z

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llvmbot · 2025-07-11T21:51:39Z

@llvm/pr-subscribers-backend-x86

Author: Tobias Decking (TDecking)

Changes

When GFNI is present, custom bit reversal lowerings for scalar integers become active. They work by swapping the bytes in the scalar value and then reversing bits in a vector of bytes. However, the custom bit reversal lowering for a vector of bytes is disabled if GFNI is present in isolation, resulting messed up code.

Full diff: https://github.com/llvm/llvm-project/pull/148304.diff

2 Files Affected:

(modified) llvm/lib/Target/X86/X86ISelLowering.cpp (+2-1)
(modified) llvm/test/CodeGen/X86/vector-bitreverse.ll (+53-47)

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 5e35d5630d667..81bdf1d79f881 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -1328,6 +1328,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
     setOperationAction(ISD::BITREVERSE, MVT::i16, Custom);
     setOperationAction(ISD::BITREVERSE, MVT::i32, Custom);
     setOperationAction(ISD::BITREVERSE, MVT::i64, Custom);
+    setOperationAction(ISD::BITREVERSE, MVT::v16i8, Custom);
   }
 
   if (!Subtarget.useSoftFloat() && Subtarget.hasSSSE3()) {
@@ -32694,7 +32695,7 @@ static SDValue LowerBITREVERSE(SDValue Op, const X86Subtarget &Subtarget,
   if (Subtarget.hasXOP() && !VT.is512BitVector())
     return LowerBITREVERSE_XOP(Op, DAG);
 
-  assert(Subtarget.hasSSSE3() && "SSSE3 required for BITREVERSE");
+  assert((Subtarget.hasSSSE3() || Subtarget.hasGFNI()) && "SSSE3 or GFNI required for BITREVERSE");
 
   SDValue In = Op.getOperand(0);
   SDLoc DL(Op);
diff --git a/llvm/test/CodeGen/X86/vector-bitreverse.ll b/llvm/test/CodeGen/X86/vector-bitreverse.ll
index 5dcf19013f0b7..4ba2ec393d5d4 100644
--- a/llvm/test/CodeGen/X86/vector-bitreverse.ll
+++ b/llvm/test/CodeGen/X86/vector-bitreverse.ll
@@ -8,6 +8,7 @@
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512BW
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=ALL,XOP,XOPAVX1
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=ALL,XOP,XOPAVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+gfni | FileCheck %s --check-prefixes=ALL,GFNIPURE
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3,+gfni | FileCheck %s --check-prefixes=ALL,GFNISSE
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+gfni | FileCheck %s --check-prefixes=ALL,GFNIAVX,GFNIAVX1
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+gfni | FileCheck %s --check-prefixes=ALL,GFNIAVX,GFNIAVX2
@@ -60,13 +61,13 @@ define i8 @test_bitreverse_i8(i8 %a) nounwind {
 ; XOP-NEXT:    # kill: def $al killed $al killed $eax
 ; XOP-NEXT:    retq
 ;
-; GFNISSE-LABEL: test_bitreverse_i8:
-; GFNISSE:       # %bb.0:
-; GFNISSE-NEXT:    movd %edi, %xmm0
-; GFNISSE-NEXT:    gf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
-; GFNISSE-NEXT:    movd %xmm0, %eax
-; GFNISSE-NEXT:    # kill: def $al killed $al killed $eax
-; GFNISSE-NEXT:    retq
+; GFNIPURE-LABEL: test_bitreverse_i8:
+; GFNIPURE:       # %bb.0:
+; GFNIPURE-NEXT:    movd %edi, %xmm0
+; GFNIPURE-NEXT:    gf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; GFNIPURE-NEXT:    movd %xmm0, %eax
+; GFNIPURE-NEXT:    # kill: def $al killed $al killed $eax
+; GFNIPURE-NEXT:    retq
 ;
 ; GFNIAVX-LABEL: test_bitreverse_i8:
 ; GFNIAVX:       # %bb.0:
@@ -134,14 +135,14 @@ define i16 @test_bitreverse_i16(i16 %a) nounwind {
 ; XOP-NEXT:    # kill: def $ax killed $ax killed $eax
 ; XOP-NEXT:    retq
 ;
-; GFNISSE-LABEL: test_bitreverse_i16:
-; GFNISSE:       # %bb.0:
-; GFNISSE-NEXT:    movd %edi, %xmm0
-; GFNISSE-NEXT:    gf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
-; GFNISSE-NEXT:    movd %xmm0, %eax
-; GFNISSE-NEXT:    rolw $8, %ax
-; GFNISSE-NEXT:    # kill: def $ax killed $ax killed $eax
-; GFNISSE-NEXT:    retq
+; GFNIPURE-LABEL: test_bitreverse_i16:
+; GFNIPURE:       # %bb.0:
+; GFNIPURE-NEXT:    movd %edi, %xmm0
+; GFNIPURE-NEXT:    gf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; GFNIPURE-NEXT:    movd %xmm0, %eax
+; GFNIPURE-NEXT:    rolw $8, %ax
+; GFNIPURE-NEXT:    # kill: def $ax killed $ax killed $eax
+; GFNIPURE-NEXT:    retq
 ;
 ; GFNIAVX-LABEL: test_bitreverse_i16:
 ; GFNIAVX:       # %bb.0:
@@ -207,13 +208,13 @@ define i32 @test_bitreverse_i32(i32 %a) nounwind {
 ; XOP-NEXT:    vmovd %xmm0, %eax
 ; XOP-NEXT:    retq
 ;
-; GFNISSE-LABEL: test_bitreverse_i32:
-; GFNISSE:       # %bb.0:
-; GFNISSE-NEXT:    movd %edi, %xmm0
-; GFNISSE-NEXT:    gf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
-; GFNISSE-NEXT:    movd %xmm0, %eax
-; GFNISSE-NEXT:    bswapl %eax
-; GFNISSE-NEXT:    retq
+; GFNIPURE-LABEL: test_bitreverse_i32:
+; GFNIPURE:       # %bb.0:
+; GFNIPURE-NEXT:    movd %edi, %xmm0
+; GFNIPURE-NEXT:    gf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; GFNIPURE-NEXT:    movd %xmm0, %eax
+; GFNIPURE-NEXT:    bswapl %eax
+; GFNIPURE-NEXT:    retq
 ;
 ; GFNIAVX-LABEL: test_bitreverse_i32:
 ; GFNIAVX:       # %bb.0:
@@ -282,13 +283,13 @@ define i64 @test_bitreverse_i64(i64 %a) nounwind {
 ; XOP-NEXT:    vmovq %xmm0, %rax
 ; XOP-NEXT:    retq
 ;
-; GFNISSE-LABEL: test_bitreverse_i64:
-; GFNISSE:       # %bb.0:
-; GFNISSE-NEXT:    movq %rdi, %xmm0
-; GFNISSE-NEXT:    gf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
-; GFNISSE-NEXT:    movq %xmm0, %rax
-; GFNISSE-NEXT:    bswapq %rax
-; GFNISSE-NEXT:    retq
+; GFNIPURE-LABEL: test_bitreverse_i64:
+; GFNIPURE:       # %bb.0:
+; GFNIPURE-NEXT:    movq %rdi, %xmm0
+; GFNIPURE-NEXT:    gf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; GFNIPURE-NEXT:    movq %xmm0, %rax
+; GFNIPURE-NEXT:    bswapq %rax
+; GFNIPURE-NEXT:    retq
 ;
 ; GFNIAVX-LABEL: test_bitreverse_i64:
 ; GFNIAVX:       # %bb.0:
@@ -386,10 +387,10 @@ define <16 x i8> @test_bitreverse_v16i8(<16 x i8> %a) nounwind {
 ; XOP-NEXT:    vpperm {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0, %xmm0
 ; XOP-NEXT:    retq
 ;
-; GFNISSE-LABEL: test_bitreverse_v16i8:
-; GFNISSE:       # %bb.0:
-; GFNISSE-NEXT:    gf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
-; GFNISSE-NEXT:    retq
+; GFNIPURE-LABEL: test_bitreverse_v16i8:
+; GFNIPURE:       # %bb.0:
+; GFNIPURE-NEXT:    gf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; GFNIPURE-NEXT:    retq
 ;
 ; GFNIAVX-LABEL: test_bitreverse_v16i8:
 ; GFNIAVX:       # %bb.0:
@@ -873,12 +874,12 @@ define <32 x i8> @test_bitreverse_v32i8(<32 x i8> %a) nounwind {
 ; XOPAVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
 ; XOPAVX2-NEXT:    retq
 ;
-; GFNISSE-LABEL: test_bitreverse_v32i8:
-; GFNISSE:       # %bb.0:
-; GFNISSE-NEXT:    movdqa {{.*#+}} xmm2 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
-; GFNISSE-NEXT:    gf2p8affineqb $0, %xmm2, %xmm0
-; GFNISSE-NEXT:    gf2p8affineqb $0, %xmm2, %xmm1
-; GFNISSE-NEXT:    retq
+; GFNIPURE-LABEL: test_bitreverse_v32i8:
+; GFNIPURE:       # %bb.0:
+; GFNIPURE-NEXT:    movdqa {{.*#+}} xmm2 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
+; GFNIPURE-NEXT:    gf2p8affineqb $0, %xmm2, %xmm0
+; GFNIPURE-NEXT:    gf2p8affineqb $0, %xmm2, %xmm1
+; GFNIPURE-NEXT:    retq
 ;
 ; GFNIAVX-LABEL: test_bitreverse_v32i8:
 ; GFNIAVX:       # %bb.0:
@@ -1724,14 +1725,14 @@ define <64 x i8> @test_bitreverse_v64i8(<64 x i8> %a) nounwind {
 ; XOPAVX2-NEXT:    vinserti128 $1, %xmm2, %ymm1, %ymm1
 ; XOPAVX2-NEXT:    retq
 ;
-; GFNISSE-LABEL: test_bitreverse_v64i8:
-; GFNISSE:       # %bb.0:
-; GFNISSE-NEXT:    movdqa {{.*#+}} xmm4 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
-; GFNISSE-NEXT:    gf2p8affineqb $0, %xmm4, %xmm0
-; GFNISSE-NEXT:    gf2p8affineqb $0, %xmm4, %xmm1
-; GFNISSE-NEXT:    gf2p8affineqb $0, %xmm4, %xmm2
-; GFNISSE-NEXT:    gf2p8affineqb $0, %xmm4, %xmm3
-; GFNISSE-NEXT:    retq
+; GFNIPURE-LABEL: test_bitreverse_v64i8:
+; GFNIPURE:       # %bb.0:
+; GFNIPURE-NEXT:    movdqa {{.*#+}} xmm4 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
+; GFNIPURE-NEXT:    gf2p8affineqb $0, %xmm4, %xmm0
+; GFNIPURE-NEXT:    gf2p8affineqb $0, %xmm4, %xmm1
+; GFNIPURE-NEXT:    gf2p8affineqb $0, %xmm4, %xmm2
+; GFNIPURE-NEXT:    gf2p8affineqb $0, %xmm4, %xmm3
+; GFNIPURE-NEXT:    retq
 ;
 ; GFNIAVX1-LABEL: test_bitreverse_v64i8:
 ; GFNIAVX1:       # %bb.0:
@@ -2849,6 +2850,11 @@ define <16 x i8> @fold_bitreverse_v16i8() nounwind {
 ; XOP-NEXT:    vmovaps {{.*#+}} xmm0 = [0,255,64,191,32,223,96,159,16,239,80,175,48,207,112,143]
 ; XOP-NEXT:    retq
 ;
+; GFNIPURE-LABEL: fold_bitreverse_v16i8:
+; GFNIPURE:       # %bb.0:
+; GFNIPURE-NEXT:    movaps {{.*#+}} xmm0 = [0,255,64,191,32,223,96,159,16,239,80,175,48,207,112,143]
+; GFNIPURE-NEXT:    retq
+;
 ; GFNISSE-LABEL: fold_bitreverse_v16i8:
 ; GFNISSE:       # %bb.0:
 ; GFNISSE-NEXT:    movaps {{.*#+}} xmm0 = [0,255,64,191,32,223,96,159,16,239,80,175,48,207,112,143]

github-actions · 2025-07-11T22:23:54Z

✅ With the latest revision this PR passed the C/C++ code formatter.

topperc · 2025-07-11T22:25:14Z

Please write a more descriptive title including [X86] and put the bug number in the description.

RKSimon

You need to use the update_llc_test_checks.py script to regenerate the vector-bitreverse.ll file

RKSimon · 2025-07-14T14:01:16Z

llvm/test/CodeGen/X86/vector-bitreverse.ll

@@ -8,6 +8,7 @@
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512BW
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=ALL,XOP,XOPAVX1
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=ALL,XOP,XOPAVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+gfni | FileCheck %s --check-prefixes=ALL,GFNIPURE
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3,+gfni | FileCheck %s --check-prefixes=ALL,GFNISSE


Change this (and the new line) to:

; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+gfni | FileCheck %s --check-prefixes=ALL,GFNISSE,,GFNISSE2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3,+gfni | FileCheck %s --check-prefixes=ALL,GFNISSE,GFNISSSE2

Thanks for the help.

Should the second line be turned into GFNISSSE3 instead of GFNISSSE2?

llvm/lib/Target/X86/X86ISelLowering.cpp

Also add a missing `Subtarget.useSoftFloat()`

RKSimon · 2025-07-18T14:36:07Z

llvm/test/CodeGen/X86/vector-bitreverse.ll

-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+gfni | FileCheck %s --check-prefixes=ALL,GFNIPURE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3,+gfni | FileCheck %s --check-prefixes=ALL,GFNISSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+gfni | FileCheck %s --check-prefixes=ALL,GFNISSE,GFNISSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3,+gfni | FileCheck %s --check-prefixes=ALL,GFNISSE,GFNISSSE2


GFNISSSE2 -> GFNISSSE3

RKSimon

LGTM

TDecking · 2025-07-18T16:54:05Z

Sorry if I caused any inconvenience.

github-actions · 2025-07-18T18:14:54Z

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…on pure GFNI targets (llvm#148304) Fixes llvm#148238. When GFNI is present, custom bit reversal lowerings for scalar integers become active. They work by swapping the bytes in the scalar value and then reversing bits in a vector of bytes. However, the custom bit reversal lowering for a vector of bytes is disabled if GFNI is present in isolation, resulting messed up code. --------- Co-authored-by: Simon Pilgrim <llvm-dev@redking.me.uk>

llvmbot added the backend:X86 label Jul 11, 2025

Fix llvm#148238

3a15c6a

TDecking force-pushed the bitrev branch from 64d08b3 to 3a15c6a Compare July 11, 2025 23:35

TDecking changed the title ~~Fix #148238~~ [X86] Ensure that bit reversals of byte vectors are properly lowered on pure GFNI targets Jul 11, 2025

RKSimon self-requested a review July 14, 2025 13:59

RKSimon reviewed Jul 14, 2025

View reviewed changes

RKSimon requested a review from topperc July 14, 2025 14:02

topperc reviewed Jul 15, 2025

View reviewed changes

llvm/lib/Target/X86/X86ISelLowering.cpp Show resolved Hide resolved

TDecking added 2 commits July 18, 2025 13:37

Update the test file

d4194ec

Extend the optimization towards other vectors

c097e12

Also add a missing `Subtarget.useSoftFloat()`

RKSimon reviewed Jul 18, 2025

View reviewed changes

Turn SSSE2 into SSSE3

718deea

RKSimon approved these changes Jul 18, 2025

View reviewed changes

Formatting

4f27cd7

TDecking force-pushed the bitrev branch from f975d75 to 4f27cd7 Compare July 18, 2025 16:52

Merge branch 'main' into bitrev

aaf7f6d

RKSimon merged commit 10b0dee into llvm:main Jul 18, 2025
8 of 9 checks passed

TDecking deleted the bitrev branch July 18, 2025 19:12

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