Early firing the ISR causes interruption to other waveforms, let it pick up new starts at next regular interval.

dok-net · dok-net · commit 3979734caea9 · 2021-06-08T03:38:22.000+02:00
diff --git a/cores/esp8266/core_esp8266_waveform.cpp b/cores/esp8266/core_esp8266_waveform.cpp
@@ -186,10 +186,7 @@ int startWaveformClockCycles(uint8_t pin, uint32_t highCcys, uint32_t lowCcys,
     if (!waveform.timer1Running) {
       initTimer();
     }
-    else if (T1V > IRQLATENCYCCYS) {
-      // Must not interfere if Timer is due shortly
-      timer1_write(IRQLATENCYCCYS);
-    }
+    // The ISR pulls updates on the next waveform interval
   }
   else {
     wave.mode = WaveformMode::INFINITE; // turn off possible expiry to make update atomic from NMI
@@ -259,7 +256,7 @@ static IRAM_ATTR void timer1Interrupt() {
   const bool isCPU2X = CPU2X & 1;
   if ((waveform.toSetBits && !(waveform.enabled & waveform.toSetBits)) || waveform.toDisableBits) {
     // Handle enable/disable requests from main app.
-    waveform.enabled = (waveform.enabled & ~waveform.toDisableBits) | waveform.toSetBits; // Set the requested waveforms on/off
+    waveform.enabled = (waveform.enabled | waveform.toSetBits) & ~waveform.toDisableBits; // Set the requested waveforms on/off
     // Find the first GPIO being generated by checking GCC's find-first-set (returns 1 + the bit of the first 1 in an int32_t)
     waveform.toDisableBits = 0;
   }
