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lines changed Original file line number Diff line number Diff line change 20
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#include <linux/jiffies.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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- #include <linux/irqchip/arm-gic.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
@@ -75,13 +74,6 @@ static DEFINE_SPINLOCK(boot_lock);
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static void __cpuinit exynos_secondary_init (unsigned int cpu )
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{
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- /*
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- * if any interrupts are already enabled for the primary
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- * core (e.g. timer irq), then they will not have been enabled
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- * for us: do so
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- */
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- gic_secondary_init (0 );
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-
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/*
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* let the primary processor know we're out of the
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* pen, then head off into the C entry point
Original file line number Diff line number Diff line change 17
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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- #include <linux/irqchip/arm-gic.h>
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#include <asm/smp_scu.h>
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#include "core.h"
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extern void secondary_startup (void );
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- static void __cpuinit highbank_secondary_init (unsigned int cpu )
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- {
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- gic_secondary_init (0 );
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- }
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-
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static int __cpuinit highbank_boot_secondary (unsigned int cpu , struct task_struct * idle )
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{
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highbank_set_cpu_jump (cpu , secondary_startup );
@@ -67,7 +61,6 @@ static void __init highbank_smp_prepare_cpus(unsigned int max_cpus)
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struct smp_operations highbank_smp_ops __initdata = {
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.smp_init_cpus = highbank_smp_init_cpus ,
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.smp_prepare_cpus = highbank_smp_prepare_cpus ,
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- .smp_secondary_init = highbank_secondary_init ,
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.smp_boot_secondary = highbank_boot_secondary ,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_die = highbank_cpu_die ,
Original file line number Diff line number Diff line change 12
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#include <linux/init.h>
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#include <linux/smp.h>
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- #include <linux/irqchip/arm-gic.h>
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#include <asm/page.h>
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#include <asm/smp_scu.h>
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#include <asm/mach/map.h>
@@ -52,16 +51,6 @@ void imx_scu_standby_enable(void)
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writel_relaxed (val , scu_base );
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}
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- static void __cpuinit imx_secondary_init (unsigned int cpu )
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- {
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- /*
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- * if any interrupts are already enabled for the primary
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- * core (e.g. timer irq), then they will not have been enabled
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- * for us: do so
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- */
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- gic_secondary_init (0 );
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- }
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-
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static int __cpuinit imx_boot_secondary (unsigned int cpu , struct task_struct * idle )
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{
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imx_set_cpu_jump (cpu , v7_secondary_startup );
@@ -96,7 +85,6 @@ static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
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struct smp_operations imx_smp_ops __initdata = {
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.smp_init_cpus = imx_smp_init_cpus ,
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.smp_prepare_cpus = imx_smp_prepare_cpus ,
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- .smp_secondary_init = imx_secondary_init ,
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.smp_boot_secondary = imx_boot_secondary ,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_die = imx_cpu_die ,
Original file line number Diff line number Diff line change 15
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#include <linux/jiffies.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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- #include <linux/irqchip/arm-gic.h>
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#include <asm/cacheflush.h>
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#include <asm/cputype.h>
@@ -41,13 +40,6 @@ static inline int get_core_count(void)
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static void __cpuinit msm_secondary_init (unsigned int cpu )
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{
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- /*
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- * if any interrupts are already enabled for the primary
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- * core (e.g. timer irq), then they will not have been enabled
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- * for us: do so
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- */
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- gic_secondary_init (0 );
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-
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/*
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* let the primary processor know we're out of the
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* pen, then head off into the C entry point
Original file line number Diff line number Diff line change @@ -66,13 +66,6 @@ static void __cpuinit omap4_secondary_init(unsigned int cpu)
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omap_secure_dispatcher (OMAP4_PPA_CPU_ACTRL_SMP_INDEX ,
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4 , 0 , 0 , 0 , 0 , 0 );
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- /*
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- * If any interrupts are already enabled for the primary
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- * core (e.g. timer irq), then they will not have been enabled
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- * for us: do so
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- */
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- gic_secondary_init (0 );
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-
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/*
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* Synchronise with the boot thread.
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*/
Original file line number Diff line number Diff line change 11
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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- #include <linux/irqchip/arm-gic.h>
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#include <asm/page.h>
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#include <asm/mach/map.h>
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#include <asm/smp_plat.h>
@@ -48,13 +47,6 @@ void __init sirfsoc_map_scu(void)
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static void __cpuinit sirfsoc_secondary_init (unsigned int cpu )
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{
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- /*
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- * if any interrupts are already enabled for the primary
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- * core (e.g. timer irq), then they will not have been enabled
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- * for us: do so
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- */
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- gic_secondary_init (0 );
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-
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/*
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* let the primary processor know we're out of the
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* pen, then head off into the C entry point
Original file line number Diff line number Diff line change 23
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#include <linux/spinlock.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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- #include <linux/irqchip/arm-gic.h>
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#include <mach/common.h>
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#include <mach/emev2.h>
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#include <asm/smp_plat.h>
@@ -85,11 +84,6 @@ static int __maybe_unused emev2_cpu_kill(unsigned int cpu)
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}
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- static void __cpuinit emev2_secondary_init (unsigned int cpu )
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- {
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- gic_secondary_init (0 );
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- }
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-
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static int __cpuinit emev2_boot_secondary (unsigned int cpu , struct task_struct * idle )
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{
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cpu = cpu_logical_map (cpu );
@@ -124,7 +118,6 @@ static void __init emev2_smp_init_cpus(void)
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struct smp_operations emev2_smp_ops __initdata = {
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.smp_init_cpus = emev2_smp_init_cpus ,
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.smp_prepare_cpus = emev2_smp_prepare_cpus ,
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- .smp_secondary_init = emev2_secondary_init ,
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.smp_boot_secondary = emev2_boot_secondary ,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_kill = emev2_cpu_kill ,
Original file line number Diff line number Diff line change 23
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#include <linux/spinlock.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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- #include <linux/irqchip/arm-gic.h>
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#include <mach/common.h>
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#include <mach/r8a7779.h>
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#include <asm/smp_plat.h>
@@ -132,11 +131,6 @@ static int __maybe_unused r8a7779_cpu_kill(unsigned int cpu)
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}
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- static void __cpuinit r8a7779_secondary_init (unsigned int cpu )
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- {
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- gic_secondary_init (0 );
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- }
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-
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static int __cpuinit r8a7779_boot_secondary (unsigned int cpu , struct task_struct * idle )
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{
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struct r8a7779_pm_ch * ch = NULL ;
@@ -186,7 +180,6 @@ static void __init r8a7779_smp_init_cpus(void)
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struct smp_operations r8a7779_smp_ops __initdata = {
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.smp_init_cpus = r8a7779_smp_init_cpus ,
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.smp_prepare_cpus = r8a7779_smp_prepare_cpus ,
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- .smp_secondary_init = r8a7779_secondary_init ,
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.smp_boot_secondary = r8a7779_boot_secondary ,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_kill = r8a7779_cpu_kill ,
Original file line number Diff line number Diff line change 23
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#include <linux/spinlock.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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- #include <linux/irqchip/arm-gic.h>
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#include <mach/common.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
@@ -59,11 +58,6 @@ static unsigned int __init sh73a0_get_core_count(void)
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return scu_get_core_count (scu_base );
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}
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- static void __cpuinit sh73a0_secondary_init (unsigned int cpu )
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- {
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- gic_secondary_init (0 );
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- }
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-
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static int __cpuinit sh73a0_boot_secondary (unsigned int cpu , struct task_struct * idle )
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{
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cpu = cpu_logical_map (cpu );
@@ -138,7 +132,6 @@ static void sh73a0_cpu_die(unsigned int cpu)
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struct smp_operations sh73a0_smp_ops __initdata = {
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.smp_init_cpus = sh73a0_smp_init_cpus ,
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.smp_prepare_cpus = sh73a0_smp_prepare_cpus ,
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- .smp_secondary_init = sh73a0_secondary_init ,
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.smp_boot_secondary = sh73a0_boot_secondary ,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_kill = sh73a0_cpu_kill ,
Original file line number Diff line number Diff line change 22
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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- #include <linux/irqchip/arm-gic.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_scu.h>
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extern void __iomem * sys_manager_base_addr ;
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extern void __iomem * rst_manager_base_addr ;
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- static void __cpuinit socfpga_secondary_init (unsigned int cpu )
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- {
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- /*
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- * if any interrupts are already enabled for the primary
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- * core (e.g. timer irq), then they will not have been enabled
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- * for us: do so
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- */
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- gic_secondary_init (0 );
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- }
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-
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static int __cpuinit socfpga_boot_secondary (unsigned int cpu , struct task_struct * idle )
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{
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int trampoline_size = & secondary_trampoline_end - & secondary_trampoline ;
@@ -109,7 +98,6 @@ static void socfpga_cpu_die(unsigned int cpu)
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struct smp_operations socfpga_smp_ops __initdata = {
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.smp_init_cpus = socfpga_smp_init_cpus ,
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.smp_prepare_cpus = socfpga_smp_prepare_cpus ,
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- .smp_secondary_init = socfpga_secondary_init ,
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.smp_boot_secondary = socfpga_boot_secondary ,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_die = socfpga_cpu_die ,
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