FFmpeg
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1 /*
2  * H.264/HEVC/AV1 hardware encoding using nvidia nvenc
3  * Copyright (c) 2016 Timo Rothenpieler <timo@rothenpieler.org>
4  *
5  * This file is part of FFmpeg.
6  *
7  * FFmpeg is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU Lesser General Public
9  * License as published by the Free Software Foundation; either
10  * version 2.1 of the License, or (at your option) any later version.
11  *
12  * FFmpeg is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15  * Lesser General Public License for more details.
16  *
17  * You should have received a copy of the GNU Lesser General Public
18  * License along with FFmpeg; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20  */
21 
22 #include "config.h"
23 #include "config_components.h"
24 
25 #include "nvenc.h"
26 #include "hevc/sei.h"
27 #if CONFIG_AV1_NVENC_ENCODER
28 #include "av1.h"
29 #endif
30 
32 #include "libavutil/hwcontext.h"
33 #include "libavutil/cuda_check.h"
34 #include "libavutil/imgutils.h"
35 #include "libavutil/mem.h"
36 #include "libavutil/pixdesc.h"
38 #include "libavutil/mathematics.h"
40 #include "libavutil/stereo3d.h"
41 #include "libavutil/tdrdi.h"
42 #include "atsc_a53.h"
43 #include "codec_desc.h"
44 #include "encode.h"
45 #include "internal.h"
46 #include "packet_internal.h"
47 
48 #define CHECK_CU(x) FF_CUDA_CHECK_DL(avctx, dl_fn->cuda_dl, x)
49 
50 #define NVENC_CAP 0x30
51 
52 #ifndef NVENC_NO_DEPRECATED_RC
53 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR || \
54  rc == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ || \
55  rc == NV_ENC_PARAMS_RC_CBR_HQ)
56 #else
57 #define IS_CBR(rc) (rc == NV_ENC_PARAMS_RC_CBR)
58 #endif
59 
65  AV_PIX_FMT_P016, // Truncated to 10bits
66 #ifdef NVENC_HAVE_422_SUPPORT
70 #endif
72  AV_PIX_FMT_YUV444P16, // Truncated to 10bits
81  AV_PIX_FMT_GBRP16, // Truncated to 10bits
83 #if CONFIG_D3D11VA
85 #endif
87 };
88 
90  HW_CONFIG_ENCODER_FRAMES(CUDA, CUDA),
92 #if CONFIG_D3D11VA
93  HW_CONFIG_ENCODER_FRAMES(D3D11, D3D11VA),
95 #endif
96  NULL,
97 };
98 
99 #define IS_10BIT(pix_fmt) (pix_fmt == AV_PIX_FMT_P010 || \
100  pix_fmt == AV_PIX_FMT_P016 || \
101  pix_fmt == AV_PIX_FMT_P210 || \
102  pix_fmt == AV_PIX_FMT_P216 || \
103  pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
104  pix_fmt == AV_PIX_FMT_YUV444P16 || \
105  pix_fmt == AV_PIX_FMT_X2RGB10 || \
106  pix_fmt == AV_PIX_FMT_X2BGR10 || \
107  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
108  pix_fmt == AV_PIX_FMT_GBRP16)
109 
110 #define IS_RGB(pix_fmt) (pix_fmt == AV_PIX_FMT_0RGB32 || \
111  pix_fmt == AV_PIX_FMT_RGB32 || \
112  pix_fmt == AV_PIX_FMT_0BGR32 || \
113  pix_fmt == AV_PIX_FMT_BGR32 || \
114  pix_fmt == AV_PIX_FMT_X2RGB10 || \
115  pix_fmt == AV_PIX_FMT_X2BGR10)
116 
117 #define IS_YUV444(pix_fmt) (pix_fmt == AV_PIX_FMT_YUV444P || \
118  pix_fmt == AV_PIX_FMT_YUV444P10MSB || \
119  pix_fmt == AV_PIX_FMT_YUV444P16 || \
120  pix_fmt == AV_PIX_FMT_GBRP || \
121  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
122  pix_fmt == AV_PIX_FMT_GBRP16 || \
123  (ctx->rgb_mode == NVENC_RGB_MODE_444 && IS_RGB(pix_fmt)))
124 
125 #define IS_YUV422(pix_fmt) (pix_fmt == AV_PIX_FMT_NV16 || \
126  pix_fmt == AV_PIX_FMT_P210 || \
127  pix_fmt == AV_PIX_FMT_P216)
128 
129 #define IS_GBRP(pix_fmt) (pix_fmt == AV_PIX_FMT_GBRP || \
130  pix_fmt == AV_PIX_FMT_GBRP10MSB || \
131  pix_fmt == AV_PIX_FMT_GBRP16)
132 
133 static const struct {
134  NVENCSTATUS nverr;
135  int averr;
136  const char *desc;
137 } nvenc_errors[] = {
138  { NV_ENC_SUCCESS, 0, "success" },
139  { NV_ENC_ERR_NO_ENCODE_DEVICE, AVERROR(ENOENT), "no encode device" },
140  { NV_ENC_ERR_UNSUPPORTED_DEVICE, AVERROR(ENOSYS), "unsupported device" },
141  { NV_ENC_ERR_INVALID_ENCODERDEVICE, AVERROR(EINVAL), "invalid encoder device" },
142  { NV_ENC_ERR_INVALID_DEVICE, AVERROR(EINVAL), "invalid device" },
143  { NV_ENC_ERR_DEVICE_NOT_EXIST, AVERROR(EIO), "device does not exist" },
144  { NV_ENC_ERR_INVALID_PTR, AVERROR(EFAULT), "invalid ptr" },
145  { NV_ENC_ERR_INVALID_EVENT, AVERROR(EINVAL), "invalid event" },
146  { NV_ENC_ERR_INVALID_PARAM, AVERROR(EINVAL), "invalid param" },
147  { NV_ENC_ERR_INVALID_CALL, AVERROR(EINVAL), "invalid call" },
148  { NV_ENC_ERR_OUT_OF_MEMORY, AVERROR(ENOMEM), "out of memory" },
149  { NV_ENC_ERR_ENCODER_NOT_INITIALIZED, AVERROR(EINVAL), "encoder not initialized" },
150  { NV_ENC_ERR_UNSUPPORTED_PARAM, AVERROR(ENOSYS), "unsupported param" },
151  { NV_ENC_ERR_LOCK_BUSY, AVERROR(EAGAIN), "lock busy" },
152  { NV_ENC_ERR_NOT_ENOUGH_BUFFER, AVERROR_BUFFER_TOO_SMALL, "not enough buffer"},
153  { NV_ENC_ERR_INVALID_VERSION, AVERROR(EINVAL), "invalid version" },
154  { NV_ENC_ERR_MAP_FAILED, AVERROR(EIO), "map failed" },
155  { NV_ENC_ERR_NEED_MORE_INPUT, AVERROR(EAGAIN), "need more input" },
156  { NV_ENC_ERR_ENCODER_BUSY, AVERROR(EAGAIN), "encoder busy" },
157  { NV_ENC_ERR_EVENT_NOT_REGISTERD, AVERROR(EBADF), "event not registered" },
158  { NV_ENC_ERR_GENERIC, AVERROR_UNKNOWN, "generic error" },
159  { NV_ENC_ERR_INCOMPATIBLE_CLIENT_KEY, AVERROR(EINVAL), "incompatible client key" },
160  { NV_ENC_ERR_UNIMPLEMENTED, AVERROR(ENOSYS), "unimplemented" },
161  { NV_ENC_ERR_RESOURCE_REGISTER_FAILED, AVERROR(EIO), "resource register failed" },
162  { NV_ENC_ERR_RESOURCE_NOT_REGISTERED, AVERROR(EBADF), "resource not registered" },
163  { NV_ENC_ERR_RESOURCE_NOT_MAPPED, AVERROR(EBADF), "resource not mapped" },
164 };
165 
166 static int nvenc_map_error(NVENCSTATUS err, const char **desc)
167 {
168  int i;
169  for (i = 0; i < FF_ARRAY_ELEMS(nvenc_errors); i++) {
170  if (nvenc_errors[i].nverr == err) {
171  if (desc)
172  *desc = nvenc_errors[i].desc;
173  return nvenc_errors[i].averr;
174  }
175  }
176  if (desc)
177  *desc = "unknown error";
178  return AVERROR_UNKNOWN;
179 }
180 
181 static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err,
182  const char *error_string)
183 {
184  const char *desc;
185  const char *details = "(no details)";
186  int ret = nvenc_map_error(err, &desc);
187 
188 #ifdef NVENC_HAVE_GETLASTERRORSTRING
189  NvencContext *ctx = avctx->priv_data;
190  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
191 
192  if (p_nvenc && ctx->nvencoder)
193  details = p_nvenc->nvEncGetLastErrorString(ctx->nvencoder);
194 #endif
195 
196  av_log(avctx, AV_LOG_ERROR, "%s: %s (%d): %s\n", error_string, desc, err, details);
197 
198  return ret;
199 }
200 
201 typedef struct GUIDTuple {
202  const GUID guid;
203  int flags;
204 } GUIDTuple;
205 
206 #define PRESET_ALIAS(alias, name, ...) \
207  [PRESET_ ## alias] = { NV_ENC_PRESET_ ## name ## _GUID, __VA_ARGS__ }
208 
209 #define PRESET(name, ...) PRESET_ALIAS(name, name, __VA_ARGS__)
210 
212 {
213  GUIDTuple presets[] = {
214 #ifdef NVENC_HAVE_NEW_PRESETS
215  PRESET(P1),
216  PRESET(P2),
217  PRESET(P3),
218  PRESET(P4),
219  PRESET(P5),
220  PRESET(P6),
221  PRESET(P7),
223  PRESET_ALIAS(MEDIUM, P4, NVENC_ONE_PASS),
225  // Compat aliases
230  PRESET_ALIAS(LOW_LATENCY_DEFAULT, P4, NVENC_DEPRECATED_PRESET | NVENC_LOWLATENCY),
235 #else
236  PRESET(DEFAULT),
237  PRESET(HP),
238  PRESET(HQ),
239  PRESET(BD),
240  PRESET_ALIAS(SLOW, HQ, NVENC_TWO_PASSES),
241  PRESET_ALIAS(MEDIUM, HQ, NVENC_ONE_PASS),
243  PRESET(LOW_LATENCY_DEFAULT, NVENC_LOWLATENCY),
244  PRESET(LOW_LATENCY_HP, NVENC_LOWLATENCY),
245  PRESET(LOW_LATENCY_HQ, NVENC_LOWLATENCY),
246  PRESET(LOSSLESS_DEFAULT, NVENC_LOSSLESS),
247  PRESET(LOSSLESS_HP, NVENC_LOSSLESS),
248 #endif
249  };
250 
251  GUIDTuple *t = &presets[ctx->preset];
252 
253  ctx->init_encode_params.presetGUID = t->guid;
254  ctx->flags = t->flags;
255 
256 #ifdef NVENC_HAVE_NEW_PRESETS
257  if (ctx->tuning_info == NV_ENC_TUNING_INFO_LOSSLESS)
259 #endif
260 }
261 
262 #undef PRESET
263 #undef PRESET_ALIAS
264 
266 {
267 #if NVENCAPI_CHECK_VERSION(13, 1)
268  const char *minver = "(unknown)";
269 #elif NVENCAPI_CHECK_VERSION(13, 0)
270  const char *minver = "570.0";
271 #elif NVENCAPI_CHECK_VERSION(12, 2)
272 # if defined(_WIN32) || defined(__CYGWIN__)
273  const char *minver = "551.76";
274 # else
275  const char *minver = "550.54.14";
276 # endif
277 #elif NVENCAPI_CHECK_VERSION(12, 1)
278 # if defined(_WIN32) || defined(__CYGWIN__)
279  const char *minver = "531.61";
280 # else
281  const char *minver = "530.41.03";
282 # endif
283 #elif NVENCAPI_CHECK_VERSION(12, 0)
284 # if defined(_WIN32) || defined(__CYGWIN__)
285  const char *minver = "522.25";
286 # else
287  const char *minver = "520.56.06";
288 # endif
289 #elif NVENCAPI_CHECK_VERSION(11, 1)
290 # if defined(_WIN32) || defined(__CYGWIN__)
291  const char *minver = "471.41";
292 # else
293  const char *minver = "470.57.02";
294 # endif
295 #elif NVENCAPI_CHECK_VERSION(11, 0)
296 # if defined(_WIN32) || defined(__CYGWIN__)
297  const char *minver = "456.71";
298 # else
299  const char *minver = "455.28";
300 # endif
301 #elif NVENCAPI_CHECK_VERSION(10, 0)
302 # if defined(_WIN32) || defined(__CYGWIN__)
303  const char *minver = "450.51";
304 # else
305  const char *minver = "445.87";
306 # endif
307 #elif NVENCAPI_CHECK_VERSION(9, 1)
308 # if defined(_WIN32) || defined(__CYGWIN__)
309  const char *minver = "436.15";
310 # else
311  const char *minver = "435.21";
312 # endif
313 #elif NVENCAPI_CHECK_VERSION(9, 0)
314 # if defined(_WIN32) || defined(__CYGWIN__)
315  const char *minver = "418.81";
316 # else
317  const char *minver = "418.30";
318 # endif
319 #elif NVENCAPI_CHECK_VERSION(8, 2)
320 # if defined(_WIN32) || defined(__CYGWIN__)
321  const char *minver = "397.93";
322 # else
323  const char *minver = "396.24";
324 #endif
325 #elif NVENCAPI_CHECK_VERSION(8, 1)
326 # if defined(_WIN32) || defined(__CYGWIN__)
327  const char *minver = "390.77";
328 # else
329  const char *minver = "390.25";
330 # endif
331 #else
332 # if defined(_WIN32) || defined(__CYGWIN__)
333  const char *minver = "378.66";
334 # else
335  const char *minver = "378.13";
336 # endif
337 #endif
338  av_log(avctx, level, "The minimum required Nvidia driver for nvenc is %s or newer\n", minver);
339 }
340 
342 {
343  NvencContext *ctx = avctx->priv_data;
344  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
345  NVENCSTATUS err;
346  uint32_t nvenc_max_ver;
347  int ret;
348 
349  ret = cuda_load_functions(&dl_fn->cuda_dl, avctx);
350  if (ret < 0)
351  return ret;
352 
353  ret = nvenc_load_functions(&dl_fn->nvenc_dl, avctx);
354  if (ret < 0) {
356  return ret;
357  }
358 
359  err = dl_fn->nvenc_dl->NvEncodeAPIGetMaxSupportedVersion(&nvenc_max_ver);
360  if (err != NV_ENC_SUCCESS)
361  return nvenc_print_error(avctx, err, "Failed to query nvenc max version");
362 
363  av_log(avctx, AV_LOG_VERBOSE, "Loaded Nvenc version %d.%d\n", nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
364 
365  if ((NVENCAPI_MAJOR_VERSION << 4 | NVENCAPI_MINOR_VERSION) > nvenc_max_ver) {
366  av_log(avctx, AV_LOG_ERROR, "Driver does not support the required nvenc API version. "
367  "Required: %d.%d Found: %d.%d\n",
368  NVENCAPI_MAJOR_VERSION, NVENCAPI_MINOR_VERSION,
369  nvenc_max_ver >> 4, nvenc_max_ver & 0xf);
371  return AVERROR(ENOSYS);
372  }
373 
374  dl_fn->nvenc_funcs.version = NV_ENCODE_API_FUNCTION_LIST_VER;
375 
376  err = dl_fn->nvenc_dl->NvEncodeAPICreateInstance(&dl_fn->nvenc_funcs);
377  if (err != NV_ENC_SUCCESS)
378  return nvenc_print_error(avctx, err, "Failed to create nvenc instance");
379 
380  av_log(avctx, AV_LOG_VERBOSE, "Nvenc initialized successfully\n");
381 
382  return 0;
383 }
384 
386 {
387  NvencContext *ctx = avctx->priv_data;
388  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
389 
390  if (ctx->d3d11_device)
391  return 0;
392 
393  return CHECK_CU(dl_fn->cuda_dl->cuCtxPushCurrent(ctx->cu_context));
394 }
395 
397 {
398  NvencContext *ctx = avctx->priv_data;
399  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
400  CUcontext dummy;
401 
402  if (ctx->d3d11_device)
403  return 0;
404 
405  return CHECK_CU(dl_fn->cuda_dl->cuCtxPopCurrent(&dummy));
406 }
407 
409 {
410  NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS params = { 0 };
411  NvencContext *ctx = avctx->priv_data;
412  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
413  NVENCSTATUS ret;
414 
415  params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER;
416  params.apiVersion = NVENCAPI_VERSION;
417  if (ctx->d3d11_device) {
418  params.device = ctx->d3d11_device;
419  params.deviceType = NV_ENC_DEVICE_TYPE_DIRECTX;
420  } else {
421  params.device = ctx->cu_context;
422  params.deviceType = NV_ENC_DEVICE_TYPE_CUDA;
423  }
424 
425  ret = p_nvenc->nvEncOpenEncodeSessionEx(&params, &ctx->nvencoder);
426  if (ret != NV_ENC_SUCCESS) {
427  ctx->nvencoder = NULL;
428  return nvenc_print_error(avctx, ret, "OpenEncodeSessionEx failed");
429  }
430 
431  return 0;
432 }
433 
435 {
436  NvencContext *ctx = avctx->priv_data;
437  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
438  int i, ret, count = 0;
439  GUID *guids = NULL;
440 
441  ret = p_nvenc->nvEncGetEncodeGUIDCount(ctx->nvencoder, &count);
442 
443  if (ret != NV_ENC_SUCCESS || !count)
444  return AVERROR(ENOSYS);
445 
446  guids = av_malloc(count * sizeof(GUID));
447  if (!guids)
448  return AVERROR(ENOMEM);
449 
450  ret = p_nvenc->nvEncGetEncodeGUIDs(ctx->nvencoder, guids, count, &count);
451  if (ret != NV_ENC_SUCCESS) {
452  ret = AVERROR(ENOSYS);
453  goto fail;
454  }
455 
456  ret = AVERROR(ENOSYS);
457  for (i = 0; i < count; i++) {
458  if (!memcmp(&guids[i], &ctx->init_encode_params.encodeGUID, sizeof(*guids))) {
459  ret = 0;
460  break;
461  }
462  }
463 
464 fail:
465  av_free(guids);
466 
467  return ret;
468 }
469 
470 static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
471 {
472  NvencContext *ctx = avctx->priv_data;
473  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
474  NV_ENC_CAPS_PARAM params = { 0 };
475  int ret, val = 0;
476 
477  params.version = NV_ENC_CAPS_PARAM_VER;
478  params.capsToQuery = cap;
479 
480  ret = p_nvenc->nvEncGetEncodeCaps(ctx->nvencoder, ctx->init_encode_params.encodeGUID, &params, &val);
481 
482  if (ret == NV_ENC_SUCCESS)
483  return val;
484  return 0;
485 }
486 
488 {
489  NvencContext *ctx = avctx->priv_data;
490  int tmp, ret;
491 
493  if (ret < 0) {
494  av_log(avctx, AV_LOG_WARNING, "Codec not supported\n");
495  return ret;
496  }
497 
498  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV444_ENCODE);
499  if (IS_YUV444(ctx->data_pix_fmt) && ret <= 0) {
500  av_log(avctx, AV_LOG_WARNING, "YUV444P not supported\n");
501  return AVERROR(ENOSYS);
502  }
503 
504 #ifdef NVENC_HAVE_422_SUPPORT
505  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_YUV422_ENCODE);
506 #else
507  ret = 0;
508 #endif
509  if (IS_YUV422(ctx->data_pix_fmt) && ret <= 0) {
510  av_log(avctx, AV_LOG_WARNING, "YUV422P not supported\n");
511  return AVERROR(ENOSYS);
512  }
513 
514  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOSSLESS_ENCODE);
515  if (ctx->flags & NVENC_LOSSLESS && ret <= 0) {
516  av_log(avctx, AV_LOG_WARNING, "Lossless encoding not supported\n");
517  return AVERROR(ENOSYS);
518  }
519 
520  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_WIDTH_MAX);
521  if (ret < avctx->width) {
522  av_log(avctx, AV_LOG_WARNING, "Width %d exceeds %d\n",
523  avctx->width, ret);
524  return AVERROR(ENOSYS);
525  }
526 
527  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_HEIGHT_MAX);
528  if (ret < avctx->height) {
529  av_log(avctx, AV_LOG_WARNING, "Height %d exceeds %d\n",
530  avctx->height, ret);
531  return AVERROR(ENOSYS);
532  }
533 
534  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_NUM_MAX_BFRAMES);
535  if (ret < avctx->max_b_frames) {
536  av_log(avctx, AV_LOG_WARNING, "Max B-frames %d exceed %d\n",
537  avctx->max_b_frames, ret);
538 
539  return AVERROR(ENOSYS);
540  }
541 
542  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_FIELD_ENCODING);
543  if (ret < 1 && avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
544  av_log(avctx, AV_LOG_WARNING,
545  "Interlaced encoding is not supported. Supported level: %d\n",
546  ret);
547  return AVERROR(ENOSYS);
548  }
549 
550  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_10BIT_ENCODE);
551  if ((IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) && ret <= 0) {
552  av_log(avctx, AV_LOG_WARNING, "10 bit encode not supported\n");
553  return AVERROR(ENOSYS);
554  }
555 
556  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD);
557  if (ctx->rc_lookahead > 0 && ret <= 0) {
558  av_log(avctx, AV_LOG_WARNING, "RC lookahead not supported\n");
559  return AVERROR(ENOSYS);
560  }
561 
562  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_AQ);
563  if (ctx->temporal_aq > 0 && ret <= 0) {
564  av_log(avctx, AV_LOG_WARNING, "Temporal AQ not supported\n");
565  return AVERROR(ENOSYS);
566  }
567 
568  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_WEIGHTED_PREDICTION);
569  if (ctx->weighted_pred > 0 && ret <= 0) {
570  av_log (avctx, AV_LOG_WARNING, "Weighted Prediction not supported\n");
571  return AVERROR(ENOSYS);
572  }
573 
574  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CABAC);
575  if (ctx->coder == NV_ENC_H264_ENTROPY_CODING_MODE_CABAC && ret <= 0) {
576  av_log(avctx, AV_LOG_WARNING, "CABAC entropy coding not supported\n");
577  return AVERROR(ENOSYS);
578  }
579 
580 #ifdef NVENC_HAVE_BFRAME_REF_MODE
581  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : NV_ENC_BFRAME_REF_MODE_DISABLED;
582  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_BFRAME_REF_MODE);
583  if (tmp == NV_ENC_BFRAME_REF_MODE_EACH && ret != 1 && ret != 3) {
584  av_log(avctx, AV_LOG_WARNING, "Each B frame as reference is not supported\n");
585  return AVERROR(ENOSYS);
586  } else if (tmp != NV_ENC_BFRAME_REF_MODE_DISABLED && ret == 0) {
587  av_log(avctx, AV_LOG_WARNING, "B frames as references are not supported\n");
588  return AVERROR(ENOSYS);
589  }
590 #else
591  tmp = (ctx->b_ref_mode >= 0) ? ctx->b_ref_mode : 0;
592  if (tmp > 0) {
593  av_log(avctx, AV_LOG_WARNING, "B frames as references need SDK 8.1 at build time\n");
594  return AVERROR(ENOSYS);
595  }
596 #endif
597 
598 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
599  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MULTIPLE_REF_FRAMES);
600  if(avctx->refs != NV_ENC_NUM_REF_FRAMES_AUTOSELECT && ret <= 0) {
601  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames are not supported by the device\n");
602  return AVERROR(ENOSYS);
603  }
604 #else
605  if(avctx->refs != 0) {
606  av_log(avctx, AV_LOG_WARNING, "Multiple reference frames need SDK 9.1 at build time\n");
607  return AVERROR(ENOSYS);
608  }
609 #endif
610 
611 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
612  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SINGLE_SLICE_INTRA_REFRESH);
613  if(ctx->single_slice_intra_refresh && ret <= 0) {
614  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh not supported by the device\n");
615  return AVERROR(ENOSYS);
616  }
617 #else
618  if(ctx->single_slice_intra_refresh) {
619  av_log(avctx, AV_LOG_WARNING, "Single slice intra refresh needs SDK 11.1 at build time\n");
620  return AVERROR(ENOSYS);
621  }
622 #endif
623 
624  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_INTRA_REFRESH);
625  if((ctx->intra_refresh || ctx->single_slice_intra_refresh) && ret <= 0) {
626  av_log(avctx, AV_LOG_WARNING, "Intra refresh not supported by the device\n");
627  return AVERROR(ENOSYS);
628  }
629 
630 #ifndef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
631  if (ctx->constrained_encoding && avctx->codec->id == AV_CODEC_ID_HEVC) {
632  av_log(avctx, AV_LOG_WARNING, "HEVC constrained encoding needs SDK 10.0 at build time\n");
633  return AVERROR(ENOSYS);
634  }
635 #endif
636 
637  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_CONSTRAINED_ENCODING);
638  if(ctx->constrained_encoding && ret <= 0) {
639  av_log(avctx, AV_LOG_WARNING, "Constrained encoding not supported by the device\n");
640  return AVERROR(ENOSYS);
641  }
642 
643 #if defined(NVENC_HAVE_TEMPORAL_FILTER) || defined(NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER)
644  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_TEMPORAL_FILTER);
645  if(ctx->tf_level > 0 && ret <= 0) {
646  av_log(avctx, AV_LOG_WARNING, "Temporal filtering not supported by the device\n");
647  return AVERROR(ENOSYS);
648  }
649 #endif
650 
651 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
652  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_LOOKAHEAD_LEVEL);
653  if(ctx->rc_lookahead > 0 && ctx->lookahead_level > 0 &&
654  ctx->lookahead_level != NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT &&
655  ctx->lookahead_level > ret)
656  {
657  av_log(avctx, AV_LOG_WARNING, "Lookahead level not supported. Maximum level: %d\n", ret);
658  return AVERROR(ENOSYS);
659  }
660 #endif
661 
662 #ifdef NVENC_HAVE_UNIDIR_B
663  ret = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_UNIDIRECTIONAL_B);
664  if(ctx->unidir_b && ret <= 0) {
665  av_log(avctx, AV_LOG_WARNING, "Unidirectional B-Frames not supported by the device\n");
666  return AVERROR(ENOSYS);
667  }
668 #endif
669 
670  ctx->support_dyn_bitrate = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_DYN_BITRATE_CHANGE);
671 
672 #ifdef NVENC_HAVE_MVHEVC
673  ctx->multiview_supported = nvenc_check_cap(avctx, NV_ENC_CAPS_SUPPORT_MVHEVC_ENCODE) > 0;
674  if(ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN && !ctx->multiview_supported) {
675  av_log(avctx, AV_LOG_WARNING, "Multiview not supported by the device\n");
676  return AVERROR(ENOSYS);
677  }
678 #endif
679 
680  return 0;
681 }
682 
683 static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
684 {
685  NvencContext *ctx = avctx->priv_data;
686  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
687  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
688  char name[128] = { 0};
689  int major, minor, ret;
690  CUdevice cu_device;
691  int loglevel = AV_LOG_VERBOSE;
692 
693  if (ctx->device == LIST_DEVICES)
694  loglevel = AV_LOG_INFO;
695 
696  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGet(&cu_device, idx));
697  if (ret < 0)
698  return ret;
699 
700  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceGetName(name, sizeof(name), cu_device));
701  if (ret < 0)
702  return ret;
703 
704  ret = CHECK_CU(dl_fn->cuda_dl->cuDeviceComputeCapability(&major, &minor, cu_device));
705  if (ret < 0)
706  return ret;
707 
708  av_log(avctx, loglevel, "[ GPU #%d - < %s > has Compute SM %d.%d ]\n", idx, name, major, minor);
709  if (((major << 4) | minor) < NVENC_CAP) {
710  av_log(avctx, loglevel, "does not support NVENC\n");
711  goto fail;
712  }
713 
714  if (ctx->device != idx && ctx->device != ANY_DEVICE)
715  return -1;
716 
717  ret = CHECK_CU(dl_fn->cuda_dl->cuCtxCreate(&ctx->cu_context_internal, 0, cu_device));
718  if (ret < 0)
719  goto fail;
720 
721  ctx->cu_context = ctx->cu_context_internal;
722  ctx->cu_stream = NULL;
723 
724  if ((ret = nvenc_pop_context(avctx)) < 0)
725  goto fail2;
726 
727  if ((ret = nvenc_open_session(avctx)) < 0)
728  goto fail2;
729 
730  if ((ret = nvenc_check_capabilities(avctx)) < 0)
731  goto fail3;
732 
733  av_log(avctx, loglevel, "supports NVENC\n");
734 
735  dl_fn->nvenc_device_count++;
736 
737  if (ctx->device == idx || ctx->device == ANY_DEVICE)
738  return 0;
739 
740 fail3:
741  if ((ret = nvenc_push_context(avctx)) < 0)
742  return ret;
743 
744  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
745  ctx->nvencoder = NULL;
746 
747  if ((ret = nvenc_pop_context(avctx)) < 0)
748  return ret;
749 
750 fail2:
751  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
752  ctx->cu_context_internal = NULL;
753 
754 fail:
755  return AVERROR(ENOSYS);
756 }
757 
759 {
760  NvencContext *ctx = avctx->priv_data;
761  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
762 
763  switch (avctx->codec->id) {
764  case AV_CODEC_ID_H264:
765  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_H264_GUID;
766  break;
767  case AV_CODEC_ID_HEVC:
768  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_HEVC_GUID;
769  break;
770 #if CONFIG_AV1_NVENC_ENCODER
771  case AV_CODEC_ID_AV1:
772  ctx->init_encode_params.encodeGUID = NV_ENC_CODEC_AV1_GUID;
773  break;
774 #endif
775  default:
776  return AVERROR_BUG;
777  }
778 
780 
782  av_log(avctx, AV_LOG_WARNING, "The selected preset is deprecated. Use p1 to p7 + -tune or fast/medium/slow.\n");
783 
784  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11 || avctx->hw_frames_ctx || avctx->hw_device_ctx) {
785  AVHWFramesContext *frames_ctx;
786  AVHWDeviceContext *hwdev_ctx;
787  AVCUDADeviceContext *cuda_device_hwctx = NULL;
788 #if CONFIG_D3D11VA
789  AVD3D11VADeviceContext *d3d11_device_hwctx = NULL;
790 #endif
791  int ret;
792 
793  if (avctx->hw_frames_ctx) {
794  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
795  if (frames_ctx->format == AV_PIX_FMT_CUDA)
796  cuda_device_hwctx = frames_ctx->device_ctx->hwctx;
797 #if CONFIG_D3D11VA
798  else if (frames_ctx->format == AV_PIX_FMT_D3D11)
799  d3d11_device_hwctx = frames_ctx->device_ctx->hwctx;
800 #endif
801  else
802  return AVERROR(EINVAL);
803  } else if (avctx->hw_device_ctx) {
804  hwdev_ctx = (AVHWDeviceContext*)avctx->hw_device_ctx->data;
805  if (hwdev_ctx->type == AV_HWDEVICE_TYPE_CUDA)
806  cuda_device_hwctx = hwdev_ctx->hwctx;
807 #if CONFIG_D3D11VA
808  else if (hwdev_ctx->type == AV_HWDEVICE_TYPE_D3D11VA)
809  d3d11_device_hwctx = hwdev_ctx->hwctx;
810 #endif
811  else
812  return AVERROR(EINVAL);
813  } else {
814  return AVERROR(EINVAL);
815  }
816 
817  if (cuda_device_hwctx) {
818  ctx->cu_context = cuda_device_hwctx->cuda_ctx;
819  ctx->cu_stream = cuda_device_hwctx->stream;
820  }
821 #if CONFIG_D3D11VA
822  else if (d3d11_device_hwctx) {
823  ctx->d3d11_device = d3d11_device_hwctx->device;
824  ID3D11Device_AddRef(ctx->d3d11_device);
825  }
826 #endif
827 
828  ret = nvenc_open_session(avctx);
829  if (ret < 0)
830  return ret;
831 
832  ret = nvenc_check_capabilities(avctx);
833  if (ret < 0) {
834  av_log(avctx, AV_LOG_FATAL, "Provided device doesn't support required NVENC features\n");
835  return ret;
836  }
837  } else {
838  int i, nb_devices = 0;
839 
840  if (CHECK_CU(dl_fn->cuda_dl->cuInit(0)) < 0)
841  return AVERROR_UNKNOWN;
842 
843  if (CHECK_CU(dl_fn->cuda_dl->cuDeviceGetCount(&nb_devices)) < 0)
844  return AVERROR_UNKNOWN;
845 
846  if (!nb_devices) {
847  av_log(avctx, AV_LOG_FATAL, "No CUDA capable devices found\n");
848  return AVERROR_EXTERNAL;
849  }
850 
851  av_log(avctx, AV_LOG_VERBOSE, "%d CUDA capable devices found\n", nb_devices);
852 
853  dl_fn->nvenc_device_count = 0;
854  for (i = 0; i < nb_devices; ++i) {
855  if ((nvenc_check_device(avctx, i)) >= 0 && ctx->device != LIST_DEVICES)
856  return 0;
857  }
858 
859  if (ctx->device == LIST_DEVICES)
860  return AVERROR_EXIT;
861 
862  if (!dl_fn->nvenc_device_count) {
863  av_log(avctx, AV_LOG_FATAL, "No capable devices found\n");
864  return AVERROR_EXTERNAL;
865  }
866 
867  av_log(avctx, AV_LOG_FATAL, "Requested GPU %d, but only %d GPUs are available!\n", ctx->device, nb_devices);
868  return AVERROR(EINVAL);
869  }
870 
871  return 0;
872 }
873 
874 static av_cold void set_constqp(AVCodecContext *avctx)
875 {
876  NvencContext *ctx = avctx->priv_data;
877  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
878 #if CONFIG_AV1_NVENC_ENCODER
879  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
880 #else
881  int qmax = 51;
882 #endif
883 
884  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
885 
886  if (ctx->init_qp_p >= 0) {
887  rc->constQP.qpInterP = ctx->init_qp_p;
888  if (ctx->init_qp_i >= 0 && ctx->init_qp_b >= 0) {
889  rc->constQP.qpIntra = ctx->init_qp_i;
890  rc->constQP.qpInterB = ctx->init_qp_b;
891  } else if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
892  rc->constQP.qpIntra = av_clip(
893  rc->constQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
894  rc->constQP.qpInterB = av_clip(
895  rc->constQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
896  } else {
897  rc->constQP.qpIntra = rc->constQP.qpInterP;
898  rc->constQP.qpInterB = rc->constQP.qpInterP;
899  }
900  } else if (ctx->cqp >= 0) {
901  rc->constQP.qpInterP = rc->constQP.qpInterB = rc->constQP.qpIntra = ctx->cqp;
902  if (avctx->b_quant_factor != 0.0)
903  rc->constQP.qpInterB = av_clip(ctx->cqp * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
904  if (avctx->i_quant_factor != 0.0)
905  rc->constQP.qpIntra = av_clip(ctx->cqp * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
906  }
907 
908  avctx->qmin = ctx->qmin = -1;
909  avctx->qmax = ctx->qmax = -1;
910 }
911 
912 static av_cold void set_vbr(AVCodecContext *avctx)
913 {
914  NvencContext *ctx = avctx->priv_data;
915  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
916  int qp_inter_p;
917 #if CONFIG_AV1_NVENC_ENCODER
918  int qmax = avctx->codec->id == AV_CODEC_ID_AV1 ? 255 : 51;
919 #else
920  int qmax = 51;
921 #endif
922 
923  if (avctx->qmin >= 0 || avctx->qmax >= 0)
924  av_log(avctx, AV_LOG_WARNING, "Passing qmin/qmax via global AVCodecContext options. Use encoder options instead.\n");
925 
926  if (avctx->qmin >= 0 && ctx->qmin < 0)
927  ctx->qmin = avctx->qmin;
928  if (avctx->qmax >= 0 && ctx->qmax < 0)
929  ctx->qmax = avctx->qmax;
930  avctx->qmin = ctx->qmin;
931  avctx->qmax = ctx->qmax;
932 
933  if (ctx->qmin >= 0 && ctx->qmax >= 0) {
934  rc->enableMinQP = 1;
935  rc->enableMaxQP = 1;
936 
937  rc->minQP.qpInterB = ctx->qmin;
938  rc->minQP.qpInterP = ctx->qmin;
939  rc->minQP.qpIntra = ctx->qmin;
940 
941  rc->maxQP.qpInterB = ctx->qmax;
942  rc->maxQP.qpInterP = ctx->qmax;
943  rc->maxQP.qpIntra = ctx->qmax;
944 
945  qp_inter_p = (ctx->qmax + 3 * ctx->qmin) / 4; // biased towards Qmin
946  } else if (ctx->qmin >= 0) {
947  rc->enableMinQP = 1;
948 
949  rc->minQP.qpInterB = ctx->qmin;
950  rc->minQP.qpInterP = ctx->qmin;
951  rc->minQP.qpIntra = ctx->qmin;
952 
953  qp_inter_p = ctx->qmin;
954  } else {
955  qp_inter_p = 26; // default to 26
956  }
957 
958  rc->enableInitialRCQP = 1;
959 
960  if (ctx->init_qp_p < 0) {
961  rc->initialRCQP.qpInterP = qp_inter_p;
962  } else {
963  rc->initialRCQP.qpInterP = ctx->init_qp_p;
964  }
965 
966  if (ctx->init_qp_i < 0) {
967  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
968  rc->initialRCQP.qpIntra = av_clip(
969  rc->initialRCQP.qpInterP * fabs(avctx->i_quant_factor) + avctx->i_quant_offset + 0.5, 0, qmax);
970  } else {
971  rc->initialRCQP.qpIntra = rc->initialRCQP.qpInterP;
972  }
973  } else {
974  rc->initialRCQP.qpIntra = ctx->init_qp_i;
975  }
976 
977  if (ctx->init_qp_b < 0) {
978  if (avctx->i_quant_factor != 0.0 && avctx->b_quant_factor != 0.0) {
979  rc->initialRCQP.qpInterB = av_clip(
980  rc->initialRCQP.qpInterP * fabs(avctx->b_quant_factor) + avctx->b_quant_offset + 0.5, 0, qmax);
981  } else {
982  rc->initialRCQP.qpInterB = rc->initialRCQP.qpInterP;
983  }
984  } else {
985  rc->initialRCQP.qpInterB = ctx->init_qp_b;
986  }
987 }
988 
990 {
991  NvencContext *ctx = avctx->priv_data;
992  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
993 
994  rc->rateControlMode = NV_ENC_PARAMS_RC_CONSTQP;
995  rc->constQP.qpInterB = 0;
996  rc->constQP.qpInterP = 0;
997  rc->constQP.qpIntra = 0;
998 
999  avctx->qmin = ctx->qmin = -1;
1000  avctx->qmax = ctx->qmax = -1;
1001 }
1002 
1004 {
1005  NvencContext *ctx = avctx->priv_data;
1006  NV_ENC_RC_PARAMS *rc = &ctx->encode_config.rcParams;
1007 
1008  switch (ctx->rc) {
1009  case NV_ENC_PARAMS_RC_CONSTQP:
1010  set_constqp(avctx);
1011  return;
1012 #ifndef NVENC_NO_DEPRECATED_RC
1013  case NV_ENC_PARAMS_RC_VBR_MINQP:
1014  if (avctx->qmin < 0 && ctx->qmin < 0) {
1015  av_log(avctx, AV_LOG_WARNING,
1016  "The variable bitrate rate-control requires "
1017  "the 'qmin' option set.\n");
1018  set_vbr(avctx);
1019  return;
1020  }
1021  /* fall through */
1022  case NV_ENC_PARAMS_RC_VBR_HQ:
1023 #endif
1024  case NV_ENC_PARAMS_RC_VBR:
1025  set_vbr(avctx);
1026  break;
1027  case NV_ENC_PARAMS_RC_CBR:
1028 #ifndef NVENC_NO_DEPRECATED_RC
1029  case NV_ENC_PARAMS_RC_CBR_HQ:
1030  case NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ:
1031 #endif
1032  break;
1033  }
1034 
1035  rc->rateControlMode = ctx->rc;
1036 }
1037 
1039 {
1040  NvencContext *ctx = avctx->priv_data;
1041  // default minimum of 4 surfaces
1042  // multiply by 2 for number of NVENCs on gpu (hardcode to 2)
1043  // another multiply by 2 to avoid blocking next PBB group
1044  int nb_surfaces = FFMAX(4, ctx->encode_config.frameIntervalP * 2 * 2);
1045 
1046  // lookahead enabled
1047  if (ctx->rc_lookahead > 0) {
1048  // +1 is to account for lkd_bound calculation later
1049  // +4 is to allow sufficient pipelining with lookahead
1050  nb_surfaces = FFMAX(1, FFMAX(nb_surfaces, ctx->rc_lookahead + ctx->encode_config.frameIntervalP + 1 + 4));
1051  if (nb_surfaces > ctx->nb_surfaces && ctx->nb_surfaces > 0)
1052  {
1053  av_log(avctx, AV_LOG_WARNING,
1054  "Defined rc_lookahead requires more surfaces, "
1055  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1056  }
1057  ctx->nb_surfaces = FFMAX(nb_surfaces, ctx->nb_surfaces);
1058  } else {
1059  if (ctx->encode_config.frameIntervalP > 1 && ctx->nb_surfaces < nb_surfaces && ctx->nb_surfaces > 0)
1060  {
1061  av_log(avctx, AV_LOG_WARNING,
1062  "Defined b-frame requires more surfaces, "
1063  "increasing used surfaces %d -> %d\n", ctx->nb_surfaces, nb_surfaces);
1064  ctx->nb_surfaces = FFMAX(ctx->nb_surfaces, nb_surfaces);
1065  }
1066  else if (ctx->nb_surfaces <= 0)
1067  ctx->nb_surfaces = nb_surfaces;
1068  // otherwise use user specified value
1069  }
1070 
1071  ctx->nb_surfaces = FFMAX(1, FFMIN(MAX_REGISTERED_FRAMES, ctx->nb_surfaces));
1072  ctx->async_depth = FFMIN(ctx->async_depth, ctx->nb_surfaces - 1);
1073 
1074  // Output in the worst case will only start when the surface buffer is completely full.
1075  // Hence we need to keep at least the max amount of surfaces plus the max reorder delay around.
1076  ctx->frame_data_array_nb = FFMAX(ctx->nb_surfaces, ctx->nb_surfaces + ctx->encode_config.frameIntervalP - 1);
1077 
1078  return 0;
1079 }
1080 
1082 {
1083  NvencContext *ctx = avctx->priv_data;
1084 
1085  if (avctx->global_quality > 0)
1086  av_log(avctx, AV_LOG_WARNING, "Using global_quality with nvenc is deprecated. Use qp instead.\n");
1087 
1088  if (ctx->cqp < 0 && avctx->global_quality > 0)
1089  ctx->cqp = avctx->global_quality;
1090 
1091  if (avctx->bit_rate > 0) {
1092  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate;
1093  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1094  ctx->encode_config.rcParams.maxBitRate = ctx->encode_config.rcParams.averageBitRate;
1095  }
1096 
1097  if (avctx->rc_max_rate > 0)
1098  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1099 
1100 #ifdef NVENC_HAVE_MULTIPASS
1101  ctx->encode_config.rcParams.multiPass = ctx->multipass;
1102 
1103  if (ctx->flags & NVENC_ONE_PASS)
1104  ctx->encode_config.rcParams.multiPass = NV_ENC_MULTI_PASS_DISABLED;
1105  if (ctx->flags & NVENC_TWO_PASSES || ctx->twopass > 0)
1106  ctx->encode_config.rcParams.multiPass = NV_ENC_TWO_PASS_FULL_RESOLUTION;
1107 
1108  if (ctx->rc < 0) {
1109  if (ctx->cbr) {
1110  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1111  } else if (ctx->cqp >= 0) {
1112  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1113  } else if (ctx->quality >= 0.0f) {
1114  ctx->rc = NV_ENC_PARAMS_RC_VBR;
1115  }
1116  }
1117 #else
1118  if (ctx->rc < 0) {
1119  if (ctx->flags & NVENC_ONE_PASS)
1120  ctx->twopass = 0;
1121  if (ctx->flags & NVENC_TWO_PASSES)
1122  ctx->twopass = 1;
1123 
1124  if (ctx->twopass < 0)
1125  ctx->twopass = (ctx->flags & NVENC_LOWLATENCY) != 0;
1126 
1127  if (ctx->cbr) {
1128  if (ctx->twopass) {
1129  ctx->rc = NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ;
1130  } else {
1131  ctx->rc = NV_ENC_PARAMS_RC_CBR;
1132  }
1133  } else if (ctx->cqp >= 0) {
1134  ctx->rc = NV_ENC_PARAMS_RC_CONSTQP;
1135  } else if (ctx->twopass) {
1136  ctx->rc = NV_ENC_PARAMS_RC_VBR_HQ;
1137  } else if ((avctx->qmin >= 0 && avctx->qmax >= 0) ||
1138  (ctx->qmin >= 0 && ctx->qmax >= 0)) {
1139  ctx->rc = NV_ENC_PARAMS_RC_VBR_MINQP;
1140  }
1141  }
1142 #endif
1143 
1144  if (ctx->rc >= 0 && ctx->rc & RC_MODE_DEPRECATED) {
1145  av_log(avctx, AV_LOG_WARNING, "Specified rc mode is deprecated.\n");
1146  av_log(avctx, AV_LOG_WARNING, "Use -rc constqp/cbr/vbr, -tune and -multipass instead.\n");
1147 
1148  ctx->rc &= ~RC_MODE_DEPRECATED;
1149  }
1150 
1151 #ifdef NVENC_HAVE_QP_CHROMA_OFFSETS
1152  ctx->encode_config.rcParams.cbQPIndexOffset = ctx->qp_cb_offset;
1153  ctx->encode_config.rcParams.crQPIndexOffset = ctx->qp_cr_offset;
1154 #else
1155  if (ctx->qp_cb_offset || ctx->qp_cr_offset)
1156  av_log(avctx, AV_LOG_WARNING, "Failed setting QP CB/CR offsets, SDK 11.1 or greater required at compile time.\n");
1157 #endif
1158 
1159 #ifdef NVENC_HAVE_LDKFS
1160  if (ctx->ldkfs)
1161  ctx->encode_config.rcParams.lowDelayKeyFrameScale = ctx->ldkfs;
1162 #endif
1163 
1164  if (ctx->flags & NVENC_LOSSLESS) {
1165  set_lossless(avctx);
1166  } else if (ctx->rc >= 0) {
1168  } else {
1169  ctx->encode_config.rcParams.rateControlMode = NV_ENC_PARAMS_RC_VBR;
1170  set_vbr(avctx);
1171  }
1172 
1173  if (avctx->rc_buffer_size > 0) {
1174  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size;
1175  } else if (ctx->encode_config.rcParams.averageBitRate > 0) {
1176  avctx->rc_buffer_size = ctx->encode_config.rcParams.vbvBufferSize = 2 * ctx->encode_config.rcParams.averageBitRate;
1177  }
1178 
1179  if (ctx->aq) {
1180  ctx->encode_config.rcParams.enableAQ = 1;
1181  ctx->encode_config.rcParams.aqStrength = ctx->aq_strength;
1182  av_log(avctx, AV_LOG_VERBOSE, "AQ enabled.\n");
1183  }
1184 
1185  if (ctx->temporal_aq) {
1186  ctx->encode_config.rcParams.enableTemporalAQ = 1;
1187  av_log(avctx, AV_LOG_VERBOSE, "Temporal AQ enabled.\n");
1188  }
1189 
1190  if (ctx->rc_lookahead > 0) {
1191  int lkd_bound = FFMIN(ctx->nb_surfaces, ctx->async_depth) -
1192  ctx->encode_config.frameIntervalP - 4;
1193 
1194  if (lkd_bound < 0) {
1195  ctx->encode_config.rcParams.enableLookahead = 0;
1196  av_log(avctx, AV_LOG_WARNING,
1197  "Lookahead not enabled. Increase buffer delay (-delay).\n");
1198  } else {
1199  ctx->encode_config.rcParams.enableLookahead = 1;
1200  ctx->encode_config.rcParams.lookaheadDepth = av_clip(ctx->rc_lookahead, 0, lkd_bound);
1201  ctx->encode_config.rcParams.disableIadapt = ctx->no_scenecut;
1202  ctx->encode_config.rcParams.disableBadapt = !ctx->b_adapt;
1203  av_log(avctx, AV_LOG_VERBOSE,
1204  "Lookahead enabled: depth %d, scenecut %s, B-adapt %s.\n",
1205  ctx->encode_config.rcParams.lookaheadDepth,
1206  ctx->encode_config.rcParams.disableIadapt ? "disabled" : "enabled",
1207  ctx->encode_config.rcParams.disableBadapt ? "disabled" : "enabled");
1208  if (ctx->encode_config.rcParams.lookaheadDepth < ctx->rc_lookahead)
1209  av_log(avctx, AV_LOG_WARNING, "Clipping lookahead depth to %d (from %d) due to lack of surfaces/delay",
1210  ctx->encode_config.rcParams.lookaheadDepth, ctx->rc_lookahead);
1211 
1212 #ifdef NVENC_HAVE_LOOKAHEAD_LEVEL
1213  if (ctx->lookahead_level >= 0) {
1214  switch (ctx->lookahead_level) {
1215  case NV_ENC_LOOKAHEAD_LEVEL_0:
1216  case NV_ENC_LOOKAHEAD_LEVEL_1:
1217  case NV_ENC_LOOKAHEAD_LEVEL_2:
1218  case NV_ENC_LOOKAHEAD_LEVEL_3:
1219  case NV_ENC_LOOKAHEAD_LEVEL_AUTOSELECT:
1220  break;
1221  default:
1222  av_log(avctx, AV_LOG_ERROR, "Invalid lookahead level.\n");
1223  return AVERROR(EINVAL);
1224  }
1225 
1226  ctx->encode_config.rcParams.lookaheadLevel = ctx->lookahead_level;
1227  }
1228 #endif
1229  }
1230  }
1231 
1232  if (ctx->strict_gop) {
1233  ctx->encode_config.rcParams.strictGOPTarget = 1;
1234  av_log(avctx, AV_LOG_VERBOSE, "Strict GOP target enabled.\n");
1235  }
1236 
1237  if (ctx->nonref_p)
1238  ctx->encode_config.rcParams.enableNonRefP = 1;
1239 
1240  if (ctx->zerolatency)
1241  ctx->encode_config.rcParams.zeroReorderDelay = 1;
1242 
1243  if (ctx->quality) {
1244  //convert from float to fixed point 8.8
1245  int tmp_quality = (int)(ctx->quality * 256.0f);
1246  ctx->encode_config.rcParams.targetQuality = (uint8_t)(tmp_quality >> 8);
1247  ctx->encode_config.rcParams.targetQualityLSB = (uint8_t)(tmp_quality & 0xff);
1248 
1249  av_log(avctx, AV_LOG_VERBOSE, "CQ(%d) mode enabled.\n", tmp_quality);
1250 
1251  // CQ mode shall discard avg bitrate/vbv buffer size and honor only max bitrate
1252  ctx->encode_config.rcParams.averageBitRate = avctx->bit_rate = 0;
1253  ctx->encode_config.rcParams.vbvBufferSize = avctx->rc_buffer_size = 0;
1254  ctx->encode_config.rcParams.maxBitRate = avctx->rc_max_rate;
1255  }
1256 
1257  return 0;
1258 }
1259 
1261 {
1262  NvencContext *ctx = avctx->priv_data;
1263  NV_ENC_CONFIG *cc = &ctx->encode_config;
1264  NV_ENC_CONFIG_H264 *h264 = &cc->encodeCodecConfig.h264Config;
1265  NV_ENC_CONFIG_H264_VUI_PARAMETERS *vui = &h264->h264VUIParameters;
1266 
1267  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1268 
1269  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1270  vui->colourMatrix = AVCOL_SPC_BT470BG;
1271  vui->colourPrimaries = avctx->color_primaries;
1272  vui->transferCharacteristics = avctx->color_trc;
1273  vui->videoFullRangeFlag = 0;
1274  } else {
1275  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1276  vui->colourPrimaries = avctx->color_primaries;
1277  vui->transferCharacteristics = avctx->color_trc;
1278  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1279  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1280  }
1281 
1282  vui->colourDescriptionPresentFlag =
1283  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1284 
1285  vui->videoSignalTypePresentFlag =
1286  (vui->colourDescriptionPresentFlag
1287  || vui->videoFormat != 5
1288  || vui->videoFullRangeFlag != 0);
1289 
1290  if (ctx->max_slice_size > 0) {
1291  h264->sliceMode = 1;
1292  h264->sliceModeData = ctx->max_slice_size;
1293  } else {
1294  h264->sliceMode = 3;
1295  h264->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1296  }
1297 
1298  if (ctx->intra_refresh) {
1299  h264->enableIntraRefresh = 1;
1300  h264->intraRefreshPeriod = cc->gopLength;
1301  h264->intraRefreshCnt = cc->gopLength - 1;
1302  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1303  h264->outputRecoveryPointSEI = 1;
1304 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1305  h264->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1306 #endif
1307  }
1308 
1309  if (ctx->constrained_encoding)
1310  h264->enableConstrainedEncoding = 1;
1311 
1312  h264->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1313  h264->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1314  h264->outputAUD = ctx->aud;
1315 
1316  if (ctx->dpb_size >= 0) {
1317  /* 0 means "let the hardware decide" */
1318  h264->maxNumRefFrames = ctx->dpb_size;
1319  }
1320 
1321  h264->idrPeriod = cc->gopLength;
1322 
1323  if (IS_CBR(cc->rcParams.rateControlMode)) {
1324  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1325  h264->outputBufferingPeriodSEI = ctx->cbr_padding;
1326 
1327 #ifdef NVENC_HAVE_FILLER_DATA
1328  h264->enableFillerDataInsertion = ctx->cbr_padding;
1329 #endif
1330  }
1331 
1332  h264->outputPictureTimingSEI = 1;
1333 
1334 #ifndef NVENC_NO_DEPRECATED_RC
1335  if (cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_LOWDELAY_HQ ||
1336  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_CBR_HQ ||
1337  cc->rcParams.rateControlMode == NV_ENC_PARAMS_RC_VBR_HQ) {
1338  h264->adaptiveTransformMode = NV_ENC_H264_ADAPTIVE_TRANSFORM_ENABLE;
1339  h264->fmoMode = NV_ENC_H264_FMO_DISABLE;
1340  }
1341 #endif
1342 
1343  if (ctx->flags & NVENC_LOSSLESS) {
1344  h264->qpPrimeYZeroTransformBypassFlag = 1;
1345  } else {
1346  switch(ctx->profile) {
1348  cc->profileGUID = NV_ENC_H264_PROFILE_BASELINE_GUID;
1350  break;
1352  cc->profileGUID = NV_ENC_H264_PROFILE_MAIN_GUID;
1353  avctx->profile = AV_PROFILE_H264_MAIN;
1354  break;
1356  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_GUID;
1357  avctx->profile = AV_PROFILE_H264_HIGH;
1358  break;
1359 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1360  case NV_ENC_H264_PROFILE_HIGH_10:
1361  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1363  break;
1364 #endif
1365 #ifdef NVENC_HAVE_422_SUPPORT
1366  case NV_ENC_H264_PROFILE_HIGH_422:
1367  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1369  break;
1370 #endif
1372  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1374  break;
1375  }
1376  }
1377 
1378 #ifdef NVENC_HAVE_H264_10BIT_SUPPORT
1379  // force setting profile as high10 if input is 10 bit or if it should be encoded as 10 bit
1380  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1381  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_10_GUID;
1383  }
1384 #endif
1385 
1386  // force setting profile as high444p if input is AV_PIX_FMT_YUV444P
1387  if (IS_YUV444(ctx->data_pix_fmt)) {
1388  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_444_GUID;
1390  }
1391 
1392 #ifdef NVENC_HAVE_422_SUPPORT
1393  // force setting profile as high422p if input is AV_PIX_FMT_YUV422P
1394  if (IS_YUV422(ctx->data_pix_fmt)) {
1395  cc->profileGUID = NV_ENC_H264_PROFILE_HIGH_422_GUID;
1397  }
1398 #endif
1399 
1400  vui->bitstreamRestrictionFlag = cc->gopLength != 1 || avctx->profile < AV_PROFILE_H264_HIGH;
1401 
1402  h264->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1403 
1404  h264->level = ctx->level;
1405 
1406 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1407  h264->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1408  h264->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1409 #endif
1410 
1411  if (ctx->coder >= 0)
1412  h264->entropyCodingMode = ctx->coder;
1413 
1414 #ifdef NVENC_HAVE_BFRAME_REF_MODE
1415  if (ctx->b_ref_mode >= 0)
1416  h264->useBFramesAsRef = ctx->b_ref_mode;
1417 #endif
1418 
1419 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1420  h264->numRefL0 = avctx->refs;
1421  h264->numRefL1 = avctx->refs;
1422 #endif
1423 
1424 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1425  if (ctx->tf_level >= 0) {
1426  h264->tfLevel = ctx->tf_level;
1427 
1428  switch (ctx->tf_level)
1429  {
1430  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1431  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1432  break;
1433  default:
1434  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1435  return AVERROR(EINVAL);
1436  }
1437 
1438  if (ctx->encode_config.frameIntervalP < 5)
1439  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1440  }
1441 #endif
1442 
1443 #ifdef NVENC_HAVE_TIME_CODE
1444  if (ctx->s12m_tc)
1445  h264->enableTimeCode = 1;
1446 #endif
1447 
1448  return 0;
1449 }
1450 
1452 {
1453  NvencContext *ctx = avctx->priv_data;
1454  NV_ENC_CONFIG *cc = &ctx->encode_config;
1455  NV_ENC_CONFIG_HEVC *hevc = &cc->encodeCodecConfig.hevcConfig;
1456  NV_ENC_CONFIG_HEVC_VUI_PARAMETERS *vui = &hevc->hevcVUIParameters;
1457 
1458  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1459 
1460  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1461  vui->colourMatrix = AVCOL_SPC_BT470BG;
1462  vui->colourPrimaries = avctx->color_primaries;
1463  vui->transferCharacteristics = avctx->color_trc;
1464  vui->videoFullRangeFlag = 0;
1465  } else {
1466  vui->colourMatrix = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1467  vui->colourPrimaries = avctx->color_primaries;
1468  vui->transferCharacteristics = avctx->color_trc;
1469  vui->videoFullRangeFlag = (avctx->color_range == AVCOL_RANGE_JPEG
1470  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1471  }
1472 
1473  vui->colourDescriptionPresentFlag =
1474  (vui->colourMatrix != 2 || vui->colourPrimaries != 2 || vui->transferCharacteristics != 2);
1475 
1476  vui->videoSignalTypePresentFlag =
1477  (vui->colourDescriptionPresentFlag
1478  || vui->videoFormat != 5
1479  || vui->videoFullRangeFlag != 0);
1480 
1481  if (ctx->max_slice_size > 0) {
1482  hevc->sliceMode = 1;
1483  hevc->sliceModeData = ctx->max_slice_size;
1484  } else {
1485  hevc->sliceMode = 3;
1486  hevc->sliceModeData = avctx->slices > 0 ? avctx->slices : 1;
1487  }
1488 
1489  if (ctx->intra_refresh) {
1490  hevc->enableIntraRefresh = 1;
1491  hevc->intraRefreshPeriod = cc->gopLength;
1492  hevc->intraRefreshCnt = cc->gopLength - 1;
1493  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1494 #ifdef NVENC_HAVE_HEVC_OUTPUT_RECOVERY_POINT_SEI
1495  hevc->outputRecoveryPointSEI = 1;
1496 #endif
1497 #ifdef NVENC_HAVE_SINGLE_SLICE_INTRA_REFRESH
1498  hevc->singleSliceIntraRefresh = ctx->single_slice_intra_refresh;
1499 #endif
1500  }
1501 
1502 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1503  ctx->mdm = hevc->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1504  avctx->nb_decoded_side_data,
1506  ctx->cll = hevc->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1507  avctx->nb_decoded_side_data,
1509 #endif
1510 
1511 #ifdef NVENC_HAVE_HEVC_CONSTRAINED_ENCODING
1512  if (ctx->constrained_encoding)
1513  hevc->enableConstrainedEncoding = 1;
1514 #endif
1515 
1516  hevc->disableSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 1 : 0;
1517  hevc->repeatSPSPPS = (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) ? 0 : 1;
1518  hevc->outputAUD = ctx->aud;
1519 
1520  if (ctx->dpb_size >= 0) {
1521  /* 0 means "let the hardware decide" */
1522  hevc->maxNumRefFramesInDPB = ctx->dpb_size;
1523  }
1524 
1525  hevc->idrPeriod = cc->gopLength;
1526 
1527  if (IS_CBR(cc->rcParams.rateControlMode)) {
1528  /* Older SDKs use outputBufferingPeriodSEI to control filler data */
1529  hevc->outputBufferingPeriodSEI = ctx->cbr_padding;
1530 
1531 #ifdef NVENC_HAVE_FILLER_DATA
1532  hevc->enableFillerDataInsertion = ctx->cbr_padding;
1533 #endif
1534  }
1535 
1536  hevc->outputPictureTimingSEI = 1;
1537 
1538 #ifdef NVENC_HAVE_MVHEVC
1539  if (ctx->multiview_supported && (ctx->profile == NV_ENC_HEVC_PROFILE_MAIN || ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN)) {
1542  const AVStereo3D *stereo3d = sd_stereo3d ? (const AVStereo3D*)sd_stereo3d->data : NULL;
1543 
1544  if (sd_tdrdi && stereo3d && stereo3d->type == AV_STEREO3D_FRAMESEQUENCE)
1545  ctx->profile = NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN;
1546 
1547  if (ctx->profile == NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN && stereo3d &&
1548  stereo3d->type != AV_STEREO3D_2D &&
1549  stereo3d->type != AV_STEREO3D_UNSPEC &&
1550  stereo3d->type != AV_STEREO3D_FRAMESEQUENCE)
1551  {
1552  av_log(avctx, AV_LOG_WARNING, "Unsupported multiview input, disabling multiview encoding.\n");
1553  ctx->profile = NV_ENC_HEVC_PROFILE_MAIN;
1554  }
1555  }
1556 #endif
1557 
1558  switch (ctx->profile) {
1560  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1561  avctx->profile = AV_PROFILE_HEVC_MAIN;
1562  break;
1564  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1566  break;
1568  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1569  avctx->profile = AV_PROFILE_HEVC_REXT;
1570  break;
1571 #ifdef NVENC_HAVE_MVHEVC
1572  case NV_ENC_HEVC_PROFILE_MULTIVIEW_MAIN:
1573  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN_GUID;
1575  ctx->multiview = 1;
1576 
1577  hevc->enableMVHEVC = 1;
1578  hevc->outputHevc3DReferenceDisplayInfo = 1;
1579 
1580  av_log(avctx, AV_LOG_VERBOSE, "Enabling MV HEVC encoding.\n");
1581  break;
1582 #endif
1583  }
1584 
1585  // force setting profile as main10 if input is 10 bit or if it should be encoded as 10 bit
1586  if (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) {
1587  cc->profileGUID = NV_ENC_HEVC_PROFILE_MAIN10_GUID;
1589  }
1590 
1591  // force setting profile as rext if input is yuv444 or yuv422
1592  if (IS_YUV444(ctx->data_pix_fmt) || IS_YUV422(ctx->data_pix_fmt)) {
1593  cc->profileGUID = NV_ENC_HEVC_PROFILE_FREXT_GUID;
1594  avctx->profile = AV_PROFILE_HEVC_REXT;
1595  }
1596 
1597 #ifdef NVENC_HAVE_MVHEVC
1598  if (ctx->multiview && avctx->profile != AV_PROFILE_HEVC_MULTIVIEW_MAIN) {
1599  av_log(avctx, AV_LOG_ERROR, "Multiview encoding only works for Main profile content.\n");
1600  return AVERROR(EINVAL);
1601  }
1602 #endif
1603 
1604  hevc->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : IS_YUV422(ctx->data_pix_fmt) ? 2 : 1;
1605 
1606 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1607  hevc->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1608  hevc->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1609 #else
1610  hevc->pixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1611 #endif
1612 
1613  hevc->level = ctx->level;
1614 
1615  hevc->tier = ctx->tier;
1616 
1617 #ifdef NVENC_HAVE_HEVC_BFRAME_REF_MODE
1618  if (ctx->b_ref_mode >= 0)
1619  hevc->useBFramesAsRef = ctx->b_ref_mode;
1620 #endif
1621 
1622 #ifdef NVENC_HAVE_MULTIPLE_REF_FRAMES
1623  hevc->numRefL0 = avctx->refs;
1624  hevc->numRefL1 = avctx->refs;
1625 #endif
1626 
1627 #ifdef NVENC_HAVE_TEMPORAL_FILTER
1628  if (ctx->tf_level >= 0) {
1629  hevc->tfLevel = ctx->tf_level;
1630 
1631  switch (ctx->tf_level)
1632  {
1633  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1634  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1635  break;
1636  default:
1637  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1638  return AVERROR(EINVAL);
1639  }
1640 
1641  if (ctx->encode_config.frameIntervalP < 5)
1642  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1643  }
1644 #endif
1645 
1646  return 0;
1647 }
1648 
1649 #if CONFIG_AV1_NVENC_ENCODER
1650 static av_cold int nvenc_setup_av1_config(AVCodecContext *avctx)
1651 {
1652  NvencContext *ctx = avctx->priv_data;
1653  NV_ENC_CONFIG *cc = &ctx->encode_config;
1654  NV_ENC_CONFIG_AV1 *av1 = &cc->encodeCodecConfig.av1Config;
1655 
1656  const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(ctx->data_pix_fmt);
1657 
1658  if ((pixdesc->flags & AV_PIX_FMT_FLAG_RGB) && !IS_GBRP(ctx->data_pix_fmt)) {
1659  av1->matrixCoefficients = AVCOL_SPC_BT470BG;
1660  av1->colorPrimaries = avctx->color_primaries;
1661  av1->transferCharacteristics = avctx->color_trc;
1662  av1->colorRange = 0;
1663  } else {
1664  av1->matrixCoefficients = IS_GBRP(ctx->data_pix_fmt) ? AVCOL_SPC_RGB : avctx->colorspace;
1665  av1->colorPrimaries = avctx->color_primaries;
1666  av1->transferCharacteristics = avctx->color_trc;
1667  av1->colorRange = (avctx->color_range == AVCOL_RANGE_JPEG
1668  || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ420P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ422P || ctx->data_pix_fmt == AV_PIX_FMT_YUVJ444P);
1669  }
1670 
1671  if (IS_YUV444(ctx->data_pix_fmt)) {
1672  av_log(avctx, AV_LOG_ERROR, "AV1 High Profile not supported, required for 4:4:4 encoding\n");
1673  return AVERROR(ENOTSUP);
1674  } else {
1675  cc->profileGUID = NV_ENC_AV1_PROFILE_MAIN_GUID;
1676  avctx->profile = AV_PROFILE_AV1_MAIN;
1677  }
1678 
1679  if (ctx->dpb_size >= 0) {
1680  /* 0 means "let the hardware decide" */
1681  av1->maxNumRefFramesInDPB = ctx->dpb_size;
1682  }
1683 
1684  if (ctx->intra_refresh) {
1685  av1->enableIntraRefresh = 1;
1686  av1->intraRefreshPeriod = cc->gopLength;
1687  av1->intraRefreshCnt = cc->gopLength - 1;
1688  cc->gopLength = NVENC_INFINITE_GOPLENGTH;
1689  }
1690 
1691  av1->idrPeriod = cc->gopLength;
1692 
1693  if (IS_CBR(cc->rcParams.rateControlMode)) {
1694  av1->enableBitstreamPadding = ctx->cbr_padding;
1695  }
1696 
1697  if (ctx->tile_cols >= 0)
1698  av1->numTileColumns = ctx->tile_cols;
1699  if (ctx->tile_rows >= 0)
1700  av1->numTileRows = ctx->tile_rows;
1701 
1702  av1->outputAnnexBFormat = 0;
1703 
1704  av1->level = ctx->level;
1705  av1->tier = ctx->tier;
1706 
1707  av1->enableTimingInfo = ctx->timing_info;
1708 
1709  /* mp4 encapsulation requires sequence headers to be present on all keyframes for AV1 */
1710  av1->disableSeqHdr = 0;
1711  av1->repeatSeqHdr = 1;
1712 
1713  av1->chromaFormatIDC = IS_YUV444(ctx->data_pix_fmt) ? 3 : 1;
1714 
1715 #ifdef NVENC_HAVE_NEW_BIT_DEPTH_API
1716  av1->inputBitDepth = IS_10BIT(ctx->data_pix_fmt) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1717  av1->outputBitDepth = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? NV_ENC_BIT_DEPTH_10 : NV_ENC_BIT_DEPTH_8;
1718 #else
1719  av1->inputPixelBitDepthMinus8 = IS_10BIT(ctx->data_pix_fmt) ? 2 : 0;
1720  av1->pixelBitDepthMinus8 = (IS_10BIT(ctx->data_pix_fmt) || ctx->highbitdepth) ? 2 : 0;
1721 #endif
1722 
1723 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
1724  ctx->mdm = av1->outputMasteringDisplay = !!av_frame_side_data_get(avctx->decoded_side_data,
1725  avctx->nb_decoded_side_data,
1727  ctx->cll = av1->outputMaxCll = !!av_frame_side_data_get(avctx->decoded_side_data,
1728  avctx->nb_decoded_side_data,
1730 #endif
1731 
1732  if (ctx->b_ref_mode >= 0)
1733  av1->useBFramesAsRef = ctx->b_ref_mode;
1734 
1735  av1->numFwdRefs = avctx->refs;
1736  av1->numBwdRefs = avctx->refs;
1737 
1738 #ifdef NVENC_HAVE_H264_AND_AV1_TEMPORAL_FILTER
1739  if (ctx->tf_level >= 0) {
1740  av1->tfLevel = ctx->tf_level;
1741 
1742  switch (ctx->tf_level)
1743  {
1744  case NV_ENC_TEMPORAL_FILTER_LEVEL_0:
1745  case NV_ENC_TEMPORAL_FILTER_LEVEL_4:
1746  break;
1747  default:
1748  av_log(avctx, AV_LOG_ERROR, "Invalid temporal filtering level.\n");
1749  return AVERROR(EINVAL);
1750  }
1751 
1752  if (ctx->encode_config.frameIntervalP < 5)
1753  av_log(avctx, AV_LOG_WARNING, "Temporal filtering needs at least 4 B-Frames (-bf 4).\n");
1754  }
1755 #endif
1756 
1757  return 0;
1758 }
1759 #endif
1760 
1762 {
1763  switch (avctx->codec->id) {
1764  case AV_CODEC_ID_H264:
1765  return nvenc_setup_h264_config(avctx);
1766  case AV_CODEC_ID_HEVC:
1767  return nvenc_setup_hevc_config(avctx);
1768 #if CONFIG_AV1_NVENC_ENCODER
1769  case AV_CODEC_ID_AV1:
1770  return nvenc_setup_av1_config(avctx);
1771 #endif
1772  /* Earlier switch/case will return if unknown codec is passed. */
1773  }
1774 
1775  return 0;
1776 }
1777 
1778 static void compute_dar(AVCodecContext *avctx, int *dw, int *dh) {
1779  int sw, sh;
1780 
1781  sw = avctx->width;
1782  sh = avctx->height;
1783 
1784 #if CONFIG_AV1_NVENC_ENCODER
1785  if (avctx->codec->id == AV_CODEC_ID_AV1) {
1786  /* For AV1 we actually need to calculate the render width/height, not the dar */
1787  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0
1788  && avctx->sample_aspect_ratio.num != avctx->sample_aspect_ratio.den)
1789  {
1790  if (avctx->sample_aspect_ratio.num > avctx->sample_aspect_ratio.den) {
1791  sw = av_rescale(sw, avctx->sample_aspect_ratio.num, avctx->sample_aspect_ratio.den);
1792  } else {
1793  sh = av_rescale(sh, avctx->sample_aspect_ratio.den, avctx->sample_aspect_ratio.num);
1794  }
1795  }
1796 
1797  *dw = sw;
1798  *dh = sh;
1799  return;
1800  }
1801 #endif
1802 
1803  if (avctx->sample_aspect_ratio.num > 0 && avctx->sample_aspect_ratio.den > 0) {
1804  sw *= avctx->sample_aspect_ratio.num;
1805  sh *= avctx->sample_aspect_ratio.den;
1806  }
1807 
1808  av_reduce(dw, dh, sw, sh, 1024 * 1024);
1809 }
1810 
1812 {
1813  NvencContext *ctx = avctx->priv_data;
1814  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
1815  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
1816 
1817  NV_ENC_PRESET_CONFIG preset_config = { 0 };
1818  NVENCSTATUS nv_status = NV_ENC_SUCCESS;
1819  AVCPBProperties *cpb_props;
1820  int res = 0;
1821  int dw, dh;
1822 
1823  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1824  ctx->init_encode_params.version = NV_ENC_INITIALIZE_PARAMS_VER;
1825 
1826  ctx->init_encode_params.encodeHeight = avctx->height;
1827  ctx->init_encode_params.encodeWidth = avctx->width;
1828 
1829  ctx->init_encode_params.encodeConfig = &ctx->encode_config;
1830 
1831  preset_config.version = NV_ENC_PRESET_CONFIG_VER;
1832  preset_config.presetCfg.version = NV_ENC_CONFIG_VER;
1833 
1834 #ifdef NVENC_HAVE_NEW_PRESETS
1835  ctx->init_encode_params.tuningInfo = ctx->tuning_info;
1836 
1837  if (ctx->flags & NVENC_LOSSLESS)
1838  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOSSLESS;
1839  else if (ctx->flags & NVENC_LOWLATENCY)
1840  ctx->init_encode_params.tuningInfo = NV_ENC_TUNING_INFO_LOW_LATENCY;
1841 
1842  nv_status = p_nvenc->nvEncGetEncodePresetConfigEx(ctx->nvencoder,
1843  ctx->init_encode_params.encodeGUID,
1844  ctx->init_encode_params.presetGUID,
1845  ctx->init_encode_params.tuningInfo,
1846  &preset_config);
1847 #else
1848  nv_status = p_nvenc->nvEncGetEncodePresetConfig(ctx->nvencoder,
1849  ctx->init_encode_params.encodeGUID,
1850  ctx->init_encode_params.presetGUID,
1851  &preset_config);
1852 #endif
1853  if (nv_status != NV_ENC_SUCCESS)
1854  return nvenc_print_error(avctx, nv_status, "Cannot get the preset configuration");
1855 
1856  memcpy(&ctx->encode_config, &preset_config.presetCfg, sizeof(ctx->encode_config));
1857 
1858  ctx->encode_config.version = NV_ENC_CONFIG_VER;
1859 
1860  compute_dar(avctx, &dw, &dh);
1861  ctx->init_encode_params.darHeight = dh;
1862  ctx->init_encode_params.darWidth = dw;
1863 
1864  if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
1865  ctx->init_encode_params.frameRateNum = avctx->framerate.num;
1866  ctx->init_encode_params.frameRateDen = avctx->framerate.den;
1867  } else {
1868  ctx->init_encode_params.frameRateNum = avctx->time_base.den;
1869  ctx->init_encode_params.frameRateDen = avctx->time_base.num;
1870  }
1871 
1872 #ifdef NVENC_HAVE_UNIDIR_B
1873  ctx->init_encode_params.enableUniDirectionalB = ctx->unidir_b;
1874 #endif
1875 
1876  ctx->init_encode_params.enableEncodeAsync = 0;
1877  ctx->init_encode_params.enablePTD = 1;
1878 
1879 #ifdef NVENC_HAVE_NEW_PRESETS
1880  /* If lookahead isn't set from CLI, use value from preset.
1881  * P6 & P7 presets may enable lookahead for better quality.
1882  * */
1883  if (ctx->rc_lookahead == 0 && ctx->encode_config.rcParams.enableLookahead)
1884  ctx->rc_lookahead = ctx->encode_config.rcParams.lookaheadDepth;
1885 #endif
1886 
1887  if (ctx->weighted_pred == 1)
1888  ctx->init_encode_params.enableWeightedPrediction = 1;
1889 
1890 #ifdef NVENC_HAVE_SPLIT_FRAME_ENCODING
1891  ctx->init_encode_params.splitEncodeMode = ctx->split_encode_mode;
1892 
1893  if (ctx->split_encode_mode != NV_ENC_SPLIT_DISABLE_MODE) {
1894  if (avctx->codec->id == AV_CODEC_ID_HEVC && ctx->weighted_pred == 1)
1895  av_log(avctx, AV_LOG_WARNING, "Split encoding not supported with weighted prediction enabled.\n");
1896  }
1897 #endif
1898 
1899  if (ctx->bluray_compat) {
1900  ctx->aud = 1;
1901  ctx->dpb_size = FFMIN(FFMAX(avctx->refs, 0), 6);
1902  avctx->max_b_frames = FFMIN(avctx->max_b_frames, 3);
1903  switch (avctx->codec->id) {
1904  case AV_CODEC_ID_H264:
1905  /* maximum level depends on used resolution */
1906  break;
1907  case AV_CODEC_ID_HEVC:
1908  ctx->level = NV_ENC_LEVEL_HEVC_51;
1909  ctx->tier = NV_ENC_TIER_HEVC_HIGH;
1910  break;
1911  }
1912  }
1913 
1914  if (avctx->gop_size > 0) {
1915  // only overwrite preset if a GOP size was selected as input
1916  ctx->encode_config.gopLength = avctx->gop_size;
1917  } else if (avctx->gop_size == 0) {
1918  ctx->encode_config.frameIntervalP = 0;
1919  ctx->encode_config.gopLength = 1;
1920  }
1921 
1922  if (avctx->max_b_frames >= 0 && ctx->encode_config.gopLength > 1) {
1923  /* 0 is intra-only, 1 is I/P only, 2 is one B-Frame, 3 two B-frames, and so on. */
1924  ctx->encode_config.frameIntervalP = avctx->max_b_frames + 1;
1925  }
1926 
1927  /* force to enable intra refresh */
1928  if(ctx->single_slice_intra_refresh)
1929  ctx->intra_refresh = 1;
1930 
1931  nvenc_recalc_surfaces(avctx);
1932 
1933  res = nvenc_setup_rate_control(avctx);
1934  if (res < 0)
1935  return res;
1936 
1937  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
1938  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FIELD;
1939  } else {
1940  ctx->encode_config.frameFieldMode = NV_ENC_PARAMS_FRAME_FIELD_MODE_FRAME;
1941  }
1942 
1943  res = nvenc_setup_codec_config(avctx);
1944  if (res)
1945  return res;
1946 
1947  res = nvenc_push_context(avctx);
1948  if (res < 0)
1949  return res;
1950 
1951  nv_status = p_nvenc->nvEncInitializeEncoder(ctx->nvencoder, &ctx->init_encode_params);
1952  if (nv_status != NV_ENC_SUCCESS) {
1953  nvenc_pop_context(avctx);
1954  return nvenc_print_error(avctx, nv_status, "InitializeEncoder failed");
1955  }
1956 
1957 #ifdef NVENC_HAVE_CUSTREAM_PTR
1958  if (ctx->cu_context) {
1959  nv_status = p_nvenc->nvEncSetIOCudaStreams(ctx->nvencoder, &ctx->cu_stream, &ctx->cu_stream);
1960  if (nv_status != NV_ENC_SUCCESS) {
1961  nvenc_pop_context(avctx);
1962  return nvenc_print_error(avctx, nv_status, "SetIOCudaStreams failed");
1963  }
1964  }
1965 #endif
1966 
1967  res = nvenc_pop_context(avctx);
1968  if (res < 0)
1969  return res;
1970 
1971  if (ctx->encode_config.frameIntervalP > 1)
1972  avctx->has_b_frames = 2;
1973 
1974  if (ctx->encode_config.rcParams.averageBitRate > 0)
1975  avctx->bit_rate = ctx->encode_config.rcParams.averageBitRate;
1976 
1977  cpb_props = ff_encode_add_cpb_side_data(avctx);
1978  if (!cpb_props)
1979  return AVERROR(ENOMEM);
1980  cpb_props->max_bitrate = ctx->encode_config.rcParams.maxBitRate;
1981  cpb_props->avg_bitrate = avctx->bit_rate;
1982  cpb_props->buffer_size = ctx->encode_config.rcParams.vbvBufferSize;
1983 
1984  return 0;
1985 }
1986 
1987 static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
1988 {
1989  switch (pix_fmt) {
1990  case AV_PIX_FMT_YUV420P:
1991  return NV_ENC_BUFFER_FORMAT_YV12;
1992  case AV_PIX_FMT_NV12:
1993  return NV_ENC_BUFFER_FORMAT_NV12;
1994  case AV_PIX_FMT_P010:
1995  case AV_PIX_FMT_P016:
1996  return NV_ENC_BUFFER_FORMAT_YUV420_10BIT;
1997  case AV_PIX_FMT_GBRP:
1998  case AV_PIX_FMT_YUV444P:
1999  return NV_ENC_BUFFER_FORMAT_YUV444;
2000  case AV_PIX_FMT_GBRP16:
2001  case AV_PIX_FMT_GBRP10MSB:
2002  case AV_PIX_FMT_YUV444P16:
2004  return NV_ENC_BUFFER_FORMAT_YUV444_10BIT;
2005  case AV_PIX_FMT_0RGB32:
2006  case AV_PIX_FMT_RGB32:
2007  return NV_ENC_BUFFER_FORMAT_ARGB;
2008  case AV_PIX_FMT_0BGR32:
2009  case AV_PIX_FMT_BGR32:
2010  return NV_ENC_BUFFER_FORMAT_ABGR;
2011  case AV_PIX_FMT_X2RGB10:
2012  return NV_ENC_BUFFER_FORMAT_ARGB10;
2013  case AV_PIX_FMT_X2BGR10:
2014  return NV_ENC_BUFFER_FORMAT_ABGR10;
2015 #ifdef NVENC_HAVE_422_SUPPORT
2016  case AV_PIX_FMT_NV16:
2017  return NV_ENC_BUFFER_FORMAT_NV16;
2018  case AV_PIX_FMT_P210:
2019  case AV_PIX_FMT_P216:
2020  return NV_ENC_BUFFER_FORMAT_P210;
2021 #endif
2022  default:
2023  return NV_ENC_BUFFER_FORMAT_UNDEFINED;
2024  }
2025 }
2026 
2027 static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
2028 {
2029  NvencContext *ctx = avctx->priv_data;
2030  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2031  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2032  NvencSurface* tmp_surface = &ctx->surfaces[idx];
2033 
2034  NVENCSTATUS nv_status;
2035  NV_ENC_CREATE_BITSTREAM_BUFFER allocOut = { 0 };
2036  allocOut.version = NV_ENC_CREATE_BITSTREAM_BUFFER_VER;
2037 
2038  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2039  ctx->surfaces[idx].in_ref = av_frame_alloc();
2040  if (!ctx->surfaces[idx].in_ref)
2041  return AVERROR(ENOMEM);
2042  } else {
2043  NV_ENC_CREATE_INPUT_BUFFER allocSurf = { 0 };
2044 
2045  ctx->surfaces[idx].format = nvenc_map_buffer_format(ctx->data_pix_fmt);
2046  if (ctx->surfaces[idx].format == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2047  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2048  av_get_pix_fmt_name(ctx->data_pix_fmt));
2049  return AVERROR(EINVAL);
2050  }
2051 
2052  allocSurf.version = NV_ENC_CREATE_INPUT_BUFFER_VER;
2053  allocSurf.width = avctx->width;
2054  allocSurf.height = avctx->height;
2055  allocSurf.bufferFmt = ctx->surfaces[idx].format;
2056 
2057  nv_status = p_nvenc->nvEncCreateInputBuffer(ctx->nvencoder, &allocSurf);
2058  if (nv_status != NV_ENC_SUCCESS) {
2059  return nvenc_print_error(avctx, nv_status, "CreateInputBuffer failed");
2060  }
2061 
2062  ctx->surfaces[idx].input_surface = allocSurf.inputBuffer;
2063  ctx->surfaces[idx].width = allocSurf.width;
2064  ctx->surfaces[idx].height = allocSurf.height;
2065  }
2066 
2067  nv_status = p_nvenc->nvEncCreateBitstreamBuffer(ctx->nvencoder, &allocOut);
2068  if (nv_status != NV_ENC_SUCCESS) {
2069  int err = nvenc_print_error(avctx, nv_status, "CreateBitstreamBuffer failed");
2070  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2071  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[idx].input_surface);
2072  av_frame_free(&ctx->surfaces[idx].in_ref);
2073  return err;
2074  }
2075 
2076  ctx->surfaces[idx].output_surface = allocOut.bitstreamBuffer;
2077 
2078  av_fifo_write(ctx->unused_surface_queue, &tmp_surface, 1);
2079 
2080  return 0;
2081 }
2082 
2084 {
2085  NvencContext *ctx = avctx->priv_data;
2086  int i, res = 0, res2;
2087 
2088  ctx->surfaces = av_calloc(ctx->nb_surfaces, sizeof(*ctx->surfaces));
2089  if (!ctx->surfaces)
2090  return AVERROR(ENOMEM);
2091 
2092  ctx->frame_data_array = av_calloc(ctx->frame_data_array_nb, sizeof(*ctx->frame_data_array));
2093  if (!ctx->frame_data_array)
2094  return AVERROR(ENOMEM);
2095 
2096  ctx->timestamp_list = av_fifo_alloc2(ctx->nb_surfaces + ctx->encode_config.frameIntervalP,
2097  sizeof(int64_t), 0);
2098  if (!ctx->timestamp_list)
2099  return AVERROR(ENOMEM);
2100 
2101  ctx->unused_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2102  if (!ctx->unused_surface_queue)
2103  return AVERROR(ENOMEM);
2104 
2105  ctx->output_surface_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2106  if (!ctx->output_surface_queue)
2107  return AVERROR(ENOMEM);
2108  ctx->output_surface_ready_queue = av_fifo_alloc2(ctx->nb_surfaces, sizeof(NvencSurface*), 0);
2109  if (!ctx->output_surface_ready_queue)
2110  return AVERROR(ENOMEM);
2111 
2112  res = nvenc_push_context(avctx);
2113  if (res < 0)
2114  return res;
2115 
2116  for (i = 0; i < ctx->nb_surfaces; i++) {
2117  if ((res = nvenc_alloc_surface(avctx, i)) < 0)
2118  goto fail;
2119  }
2120 
2121 fail:
2122  res2 = nvenc_pop_context(avctx);
2123  if (res2 < 0)
2124  return res2;
2125 
2126  return res;
2127 }
2128 
2130 {
2131  NvencContext *ctx = avctx->priv_data;
2132  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2133  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2134 
2135  NVENCSTATUS nv_status;
2136  uint32_t outSize = 0;
2137  char tmpHeader[NV_MAX_SEQ_HDR_LEN];
2138 
2139  NV_ENC_SEQUENCE_PARAM_PAYLOAD payload = { 0 };
2140  payload.version = NV_ENC_SEQUENCE_PARAM_PAYLOAD_VER;
2141 
2142  payload.spsppsBuffer = tmpHeader;
2143  payload.inBufferSize = sizeof(tmpHeader);
2144  payload.outSPSPPSPayloadSize = &outSize;
2145 
2146  nv_status = p_nvenc->nvEncGetSequenceParams(ctx->nvencoder, &payload);
2147  if (nv_status != NV_ENC_SUCCESS) {
2148  return nvenc_print_error(avctx, nv_status, "GetSequenceParams failed");
2149  }
2150 
2151  avctx->extradata_size = outSize;
2153 
2154  if (!avctx->extradata) {
2155  return AVERROR(ENOMEM);
2156  }
2157 
2158  memcpy(avctx->extradata, tmpHeader, outSize);
2159 
2160  return 0;
2161 }
2162 
2164 {
2165  NvencContext *ctx = avctx->priv_data;
2166  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2167  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2168  int i, res;
2169 
2170  /* the encoder has to be flushed before it can be closed */
2171  if (ctx->nvencoder) {
2172  NV_ENC_PIC_PARAMS params = { .version = NV_ENC_PIC_PARAMS_VER,
2173  .encodePicFlags = NV_ENC_PIC_FLAG_EOS };
2174 
2175  res = nvenc_push_context(avctx);
2176  if (res < 0)
2177  return res;
2178 
2179  p_nvenc->nvEncEncodePicture(ctx->nvencoder, &params);
2180  }
2181 
2182  av_fifo_freep2(&ctx->timestamp_list);
2183  av_fifo_freep2(&ctx->output_surface_ready_queue);
2184  av_fifo_freep2(&ctx->output_surface_queue);
2185  av_fifo_freep2(&ctx->unused_surface_queue);
2186 
2187  if (ctx->frame_data_array) {
2188  for (i = 0; i < ctx->frame_data_array_nb; i++)
2189  av_buffer_unref(&ctx->frame_data_array[i].frame_opaque_ref);
2190  av_freep(&ctx->frame_data_array);
2191  }
2192 
2193  if (ctx->surfaces && (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11)) {
2194  for (i = 0; i < ctx->nb_registered_frames; i++) {
2195  if (ctx->registered_frames[i].mapped)
2196  p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[i].in_map.mappedResource);
2197  if (ctx->registered_frames[i].regptr)
2198  p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2199  }
2200  ctx->nb_registered_frames = 0;
2201  }
2202 
2203  if (ctx->surfaces) {
2204  for (i = 0; i < ctx->nb_surfaces; ++i) {
2205  if (avctx->pix_fmt != AV_PIX_FMT_CUDA && avctx->pix_fmt != AV_PIX_FMT_D3D11)
2206  p_nvenc->nvEncDestroyInputBuffer(ctx->nvencoder, ctx->surfaces[i].input_surface);
2207  av_frame_free(&ctx->surfaces[i].in_ref);
2208  p_nvenc->nvEncDestroyBitstreamBuffer(ctx->nvencoder, ctx->surfaces[i].output_surface);
2209  }
2210  }
2211  av_freep(&ctx->surfaces);
2212  ctx->nb_surfaces = 0;
2213 
2214  av_frame_free(&ctx->frame);
2215 
2216  av_freep(&ctx->sei_data);
2217 
2218  if (ctx->nvencoder) {
2219  p_nvenc->nvEncDestroyEncoder(ctx->nvencoder);
2220 
2221  res = nvenc_pop_context(avctx);
2222  if (res < 0)
2223  return res;
2224  }
2225  ctx->nvencoder = NULL;
2226 
2227  if (ctx->cu_context_internal)
2228  CHECK_CU(dl_fn->cuda_dl->cuCtxDestroy(ctx->cu_context_internal));
2229  ctx->cu_context = ctx->cu_context_internal = NULL;
2230 
2231 #if CONFIG_D3D11VA
2232  if (ctx->d3d11_device) {
2233  ID3D11Device_Release(ctx->d3d11_device);
2234  ctx->d3d11_device = NULL;
2235  }
2236 #endif
2237 
2238  nvenc_free_functions(&dl_fn->nvenc_dl);
2239  cuda_free_functions(&dl_fn->cuda_dl);
2240 
2241  dl_fn->nvenc_device_count = 0;
2242 
2243  av_log(avctx, AV_LOG_VERBOSE, "Nvenc unloaded\n");
2244 
2245  return 0;
2246 }
2247 
2249 {
2250  NvencContext *ctx = avctx->priv_data;
2251  int ret;
2252 
2253  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2254  AVHWFramesContext *frames_ctx;
2255  if (!avctx->hw_frames_ctx) {
2256  av_log(avctx, AV_LOG_ERROR,
2257  "hw_frames_ctx must be set when using GPU frames as input\n");
2258  return AVERROR(EINVAL);
2259  }
2260  frames_ctx = (AVHWFramesContext*)avctx->hw_frames_ctx->data;
2261  if (frames_ctx->format != avctx->pix_fmt) {
2262  av_log(avctx, AV_LOG_ERROR,
2263  "hw_frames_ctx must match the GPU frame type\n");
2264  return AVERROR(EINVAL);
2265  }
2266  ctx->data_pix_fmt = frames_ctx->sw_format;
2267  } else {
2268  ctx->data_pix_fmt = avctx->pix_fmt;
2269  }
2270 
2271  if (ctx->rgb_mode == NVENC_RGB_MODE_DISABLED && IS_RGB(ctx->data_pix_fmt)) {
2272  av_log(avctx, AV_LOG_ERROR, "Packed RGB input, but RGB support is disabled.\n");
2273  return AVERROR(EINVAL);
2274  }
2275 
2276  ctx->frame = av_frame_alloc();
2277  if (!ctx->frame)
2278  return AVERROR(ENOMEM);
2279 
2280  if ((ret = nvenc_load_libraries(avctx)) < 0)
2281  return ret;
2282 
2283  if ((ret = nvenc_setup_device(avctx)) < 0)
2284  return ret;
2285 
2286  if ((ret = nvenc_setup_encoder(avctx)) < 0)
2287  return ret;
2288 
2289  if ((ret = nvenc_setup_surfaces(avctx)) < 0)
2290  return ret;
2291 
2292  if (avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) {
2293  if ((ret = nvenc_setup_extradata(avctx)) < 0)
2294  return ret;
2295  }
2296 
2297  return 0;
2298 }
2299 
2301 {
2302  NvencSurface *tmp_surf;
2303 
2304  if (av_fifo_read(ctx->unused_surface_queue, &tmp_surf, 1) < 0)
2305  // queue empty
2306  return NULL;
2307 
2308  return tmp_surf;
2309 }
2310 
2311 static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface,
2312  NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
2313 {
2314  int dst_linesize[4] = {
2315  lock_buffer_params->pitch,
2316  lock_buffer_params->pitch,
2317  lock_buffer_params->pitch,
2318  lock_buffer_params->pitch
2319  };
2320  uint8_t *dst_data[4];
2321  int ret;
2322 
2323  if (frame->format == AV_PIX_FMT_YUV420P)
2324  dst_linesize[1] = dst_linesize[2] >>= 1;
2325 
2326  ret = av_image_fill_pointers(dst_data, frame->format, nv_surface->height,
2327  lock_buffer_params->bufferDataPtr, dst_linesize);
2328  if (ret < 0)
2329  return ret;
2330 
2331  if (frame->format == AV_PIX_FMT_YUV420P)
2332  FFSWAP(uint8_t*, dst_data[1], dst_data[2]);
2333 
2334  av_image_copy2(dst_data, dst_linesize,
2335  frame->data, frame->linesize, frame->format,
2336  avctx->width, avctx->height);
2337 
2338  return 0;
2339 }
2340 
2342 {
2343  NvencContext *ctx = avctx->priv_data;
2344  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2345  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2346  NVENCSTATUS nv_status;
2347 
2348  int i, first_round;
2349 
2350  if (ctx->nb_registered_frames == FF_ARRAY_ELEMS(ctx->registered_frames)) {
2351  for (first_round = 1; first_round >= 0; first_round--) {
2352  for (i = 0; i < ctx->nb_registered_frames; i++) {
2353  if (!ctx->registered_frames[i].mapped) {
2354  if (ctx->registered_frames[i].regptr) {
2355  if (first_round)
2356  continue;
2357  nv_status = p_nvenc->nvEncUnregisterResource(ctx->nvencoder, ctx->registered_frames[i].regptr);
2358  if (nv_status != NV_ENC_SUCCESS)
2359  return nvenc_print_error(avctx, nv_status, "Failed unregistering unused input resource");
2360  ctx->registered_frames[i].ptr = NULL;
2361  ctx->registered_frames[i].regptr = NULL;
2362  }
2363  return i;
2364  }
2365  }
2366  }
2367  } else {
2368  return ctx->nb_registered_frames++;
2369  }
2370 
2371  av_log(avctx, AV_LOG_ERROR, "Too many registered CUDA frames\n");
2372  return AVERROR(ENOMEM);
2373 }
2374 
2376 {
2377  NvencContext *ctx = avctx->priv_data;
2378  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2379  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2380 
2381  AVHWFramesContext *frames_ctx = (AVHWFramesContext*)frame->hw_frames_ctx->data;
2382  NV_ENC_REGISTER_RESOURCE reg = { 0 };
2383  int i, idx, ret;
2384 
2385  for (i = 0; i < ctx->nb_registered_frames; i++) {
2386  if (avctx->pix_fmt == AV_PIX_FMT_CUDA && ctx->registered_frames[i].ptr == frame->data[0])
2387  return i;
2388  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11 && ctx->registered_frames[i].ptr == frame->data[0] && ctx->registered_frames[i].ptr_index == (intptr_t)frame->data[1])
2389  return i;
2390  }
2391 
2392  idx = nvenc_find_free_reg_resource(avctx);
2393  if (idx < 0)
2394  return idx;
2395 
2396  reg.version = NV_ENC_REGISTER_RESOURCE_VER;
2397  reg.width = frames_ctx->width;
2398  reg.height = frames_ctx->height;
2399  reg.pitch = frame->linesize[0];
2400  reg.resourceToRegister = frame->data[0];
2401 
2402  if (avctx->pix_fmt == AV_PIX_FMT_CUDA) {
2403  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_CUDADEVICEPTR;
2404  }
2405  else if (avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2406  reg.resourceType = NV_ENC_INPUT_RESOURCE_TYPE_DIRECTX;
2407  reg.subResourceIndex = (intptr_t)frame->data[1];
2408  }
2409 
2410  reg.bufferFormat = nvenc_map_buffer_format(frames_ctx->sw_format);
2411  if (reg.bufferFormat == NV_ENC_BUFFER_FORMAT_UNDEFINED) {
2412  av_log(avctx, AV_LOG_FATAL, "Invalid input pixel format: %s\n",
2413  av_get_pix_fmt_name(frames_ctx->sw_format));
2414  return AVERROR(EINVAL);
2415  }
2416 
2417  ret = p_nvenc->nvEncRegisterResource(ctx->nvencoder, &reg);
2418  if (ret != NV_ENC_SUCCESS) {
2419  nvenc_print_error(avctx, ret, "Error registering an input resource");
2420  return AVERROR_UNKNOWN;
2421  }
2422 
2423  ctx->registered_frames[idx].ptr = frame->data[0];
2424  ctx->registered_frames[idx].ptr_index = reg.subResourceIndex;
2425  ctx->registered_frames[idx].regptr = reg.registeredResource;
2426  return idx;
2427 }
2428 
2430  NvencSurface *nvenc_frame)
2431 {
2432  NvencContext *ctx = avctx->priv_data;
2433  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2434  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2435 
2436  int res;
2437  NVENCSTATUS nv_status;
2438 
2439  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2440  int reg_idx = nvenc_register_frame(avctx, frame);
2441  if (reg_idx < 0) {
2442  av_log(avctx, AV_LOG_ERROR, "Could not register an input HW frame\n");
2443  return reg_idx;
2444  }
2445 
2446  res = av_frame_ref(nvenc_frame->in_ref, frame);
2447  if (res < 0)
2448  return res;
2449 
2450  if (!ctx->registered_frames[reg_idx].mapped) {
2451  ctx->registered_frames[reg_idx].in_map.version = NV_ENC_MAP_INPUT_RESOURCE_VER;
2452  ctx->registered_frames[reg_idx].in_map.registeredResource = ctx->registered_frames[reg_idx].regptr;
2453  nv_status = p_nvenc->nvEncMapInputResource(ctx->nvencoder, &ctx->registered_frames[reg_idx].in_map);
2454  if (nv_status != NV_ENC_SUCCESS) {
2455  av_frame_unref(nvenc_frame->in_ref);
2456  return nvenc_print_error(avctx, nv_status, "Error mapping an input resource");
2457  }
2458  }
2459 
2460  ctx->registered_frames[reg_idx].mapped += 1;
2461 
2462  nvenc_frame->reg_idx = reg_idx;
2463  nvenc_frame->input_surface = ctx->registered_frames[reg_idx].in_map.mappedResource;
2464  nvenc_frame->format = ctx->registered_frames[reg_idx].in_map.mappedBufferFmt;
2465  nvenc_frame->pitch = frame->linesize[0];
2466 
2467  return 0;
2468  } else {
2469  NV_ENC_LOCK_INPUT_BUFFER lockBufferParams = { 0 };
2470 
2471  lockBufferParams.version = NV_ENC_LOCK_INPUT_BUFFER_VER;
2472  lockBufferParams.inputBuffer = nvenc_frame->input_surface;
2473 
2474  nv_status = p_nvenc->nvEncLockInputBuffer(ctx->nvencoder, &lockBufferParams);
2475  if (nv_status != NV_ENC_SUCCESS) {
2476  return nvenc_print_error(avctx, nv_status, "Failed locking nvenc input buffer");
2477  }
2478 
2479  nvenc_frame->pitch = lockBufferParams.pitch;
2480  res = nvenc_copy_frame(avctx, nvenc_frame, &lockBufferParams, frame);
2481 
2482  nv_status = p_nvenc->nvEncUnlockInputBuffer(ctx->nvencoder, nvenc_frame->input_surface);
2483  if (nv_status != NV_ENC_SUCCESS) {
2484  return nvenc_print_error(avctx, nv_status, "Failed unlocking input buffer!");
2485  }
2486 
2487  return res;
2488  }
2489 }
2490 
2491 #ifdef NVENC_HAVE_TIME_CODE
2492 static void nvenc_fill_time_code(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_TIME_CODE *time_code)
2493 {
2495 
2496  if (sd) {
2497  uint32_t *tc = (uint32_t*)sd->data;
2498  int cnt = FFMIN(tc[0], FF_ARRAY_ELEMS(time_code->clockTimestamp));
2499 
2500  switch (cnt) {
2501  case 0:
2502  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2503  time_code->skipClockTimestampInsertion = 1;
2504  break;
2505  case 2:
2506  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_DOUBLING;
2507  break;
2508  case 3:
2509  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME_TRIPLING;
2510  break;
2511  default:
2512  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2513  break;
2514  }
2515 
2516  for (int i = 0; i < cnt; i++) {
2517  unsigned hh, mm, ss, ff, drop;
2518  ff_timecode_set_smpte(&drop, &hh, &mm, &ss, &ff, avctx->framerate, tc[i + 1], 0, 0);
2519 
2520  time_code->clockTimestamp[i].countingType = 0;
2521  time_code->clockTimestamp[i].discontinuityFlag = 0;
2522  time_code->clockTimestamp[i].cntDroppedFrames = drop;
2523  time_code->clockTimestamp[i].nFrames = ff;
2524  time_code->clockTimestamp[i].secondsValue = ss;
2525  time_code->clockTimestamp[i].minutesValue = mm;
2526  time_code->clockTimestamp[i].hoursValue = hh;
2527  time_code->clockTimestamp[i].timeOffset = 0;
2528  }
2529  } else {
2530  time_code->displayPicStruct = NV_ENC_PIC_STRUCT_DISPLAY_FRAME;
2531  time_code->skipClockTimestampInsertion = 1;
2532  }
2533 }
2534 #endif
2535 
2537  NV_ENC_PIC_PARAMS *params,
2538  NV_ENC_SEI_PAYLOAD *sei_data,
2539  int sei_count)
2540 {
2541  NvencContext *ctx = avctx->priv_data;
2542 
2543  switch (avctx->codec->id) {
2544  case AV_CODEC_ID_H264:
2545  params->codecPicParams.h264PicParams.sliceMode =
2546  ctx->encode_config.encodeCodecConfig.h264Config.sliceMode;
2547  params->codecPicParams.h264PicParams.sliceModeData =
2548  ctx->encode_config.encodeCodecConfig.h264Config.sliceModeData;
2549  if (sei_count > 0) {
2550  params->codecPicParams.h264PicParams.seiPayloadArray = sei_data;
2551  params->codecPicParams.h264PicParams.seiPayloadArrayCnt = sei_count;
2552  }
2553 
2554 #ifdef NVENC_HAVE_TIME_CODE
2555  if (ctx->s12m_tc)
2556  nvenc_fill_time_code(avctx, frame, &params->codecPicParams.h264PicParams.timeCode);
2557 #endif
2558 
2559  break;
2560  case AV_CODEC_ID_HEVC:
2561  params->codecPicParams.hevcPicParams.sliceMode =
2562  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceMode;
2563  params->codecPicParams.hevcPicParams.sliceModeData =
2564  ctx->encode_config.encodeCodecConfig.hevcConfig.sliceModeData;
2565  if (sei_count > 0) {
2566  params->codecPicParams.hevcPicParams.seiPayloadArray = sei_data;
2567  params->codecPicParams.hevcPicParams.seiPayloadArrayCnt = sei_count;
2568  }
2569 
2570  break;
2571 #if CONFIG_AV1_NVENC_ENCODER
2572  case AV_CODEC_ID_AV1:
2573  params->codecPicParams.av1PicParams.numTileColumns =
2574  ctx->encode_config.encodeCodecConfig.av1Config.numTileColumns;
2575  params->codecPicParams.av1PicParams.numTileRows =
2576  ctx->encode_config.encodeCodecConfig.av1Config.numTileRows;
2577  if (sei_count > 0) {
2578  params->codecPicParams.av1PicParams.obuPayloadArray = sei_data;
2579  params->codecPicParams.av1PicParams.obuPayloadArrayCnt = sei_count;
2580  }
2581 
2582  break;
2583 #endif
2584  }
2585 }
2586 
2587 static inline void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
2588 {
2589  av_fifo_write(queue, &timestamp, 1);
2590 }
2591 
2593 {
2594  int64_t timestamp = AV_NOPTS_VALUE;
2595  // The following call might fail if the queue is empty.
2596  av_fifo_read(queue, &timestamp, 1);
2597 
2598  return timestamp;
2599 }
2600 
2601 static inline int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
2602 {
2603  int64_t timestamp = AV_NOPTS_VALUE;
2604  av_fifo_peek(queue, &timestamp, 1, index);
2605 
2606  return timestamp;
2607 }
2608 
2610  NV_ENC_LOCK_BITSTREAM *params,
2611  AVPacket *pkt)
2612 {
2613  NvencContext *ctx = avctx->priv_data;
2614  unsigned int delay;
2615  int64_t delay_time;
2616 
2617  pkt->pts = params->outputTimeStamp;
2618 
2619  if (!(avctx->codec_descriptor->props & AV_CODEC_PROP_REORDER)) {
2620  pkt->dts = pkt->pts;
2621  return 0;
2622  }
2623 
2624  // This can be more than necessary, but we don't know the real reorder delay.
2625  delay = FFMAX(ctx->encode_config.frameIntervalP - 1, 0);
2626 #ifdef NVENC_HAVE_MVHEVC
2627  delay *= ctx->multiview ? 2 : 1;
2628 #endif
2629  if (ctx->output_frame_num >= delay) {
2630  pkt->dts = timestamp_queue_dequeue(ctx->timestamp_list);
2631  ctx->output_frame_num++;
2632  return 0;
2633  }
2634 
2635  delay_time = ctx->initial_delay_time;
2636  if (!delay_time) {
2637  int64_t t1, t2, t3;
2638  t1 = timestamp_queue_peek(ctx->timestamp_list, delay);
2639  t2 = timestamp_queue_peek(ctx->timestamp_list, 0);
2640  t3 = (delay > 1) ? timestamp_queue_peek(ctx->timestamp_list, 1) : t1;
2641 
2642  if (t1 != AV_NOPTS_VALUE) {
2643  delay_time = t1 - t2;
2644  } else if (avctx->framerate.num > 0 && avctx->framerate.den > 0) {
2645  delay_time = av_rescale_q(delay, (AVRational) {avctx->framerate.den, avctx->framerate.num},
2646  avctx->time_base);
2647  } else if (t3 != AV_NOPTS_VALUE) {
2648  delay_time = delay * (t3 - t2);
2649  } else {
2650  delay_time = delay;
2651  }
2652  ctx->initial_delay_time = delay_time;
2653  }
2654 
2655  /* The following method is simple, but doesn't guarantee monotonic with VFR
2656  * when delay_time isn't accurate (that is, t1 == AV_NOPTS_VALUE)
2657  *
2658  * dts = timestamp_queue_peek(ctx->timestamp_list, ctx->output_frame_num) - delay_time
2659  */
2660  pkt->dts = timestamp_queue_peek(ctx->timestamp_list, 0) - delay_time * (delay - ctx->output_frame_num) / delay;
2661  ctx->output_frame_num++;
2662 
2663  return 0;
2664 }
2665 
2666 static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
2667 {
2668  NvencContext *ctx = avctx->priv_data;
2669  int res = 0;
2670 
2671  int idx = ctx->frame_data_array_pos;
2672  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2673 
2674  // in case the encoder got reconfigured, there might be leftovers
2676 
2677  if (frame->opaque_ref && avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2680  return AVERROR(ENOMEM);
2681  }
2682 
2683  frame_data->duration = frame->duration;
2684  frame_data->frame_opaque = frame->opaque;
2685 
2686  ctx->frame_data_array_pos = (ctx->frame_data_array_pos + 1) % ctx->frame_data_array_nb;
2687  pic_params->inputDuration = idx;
2688 
2689  return res;
2690 }
2691 
2692 static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
2693 {
2694  NvencContext *ctx = avctx->priv_data;
2695  int res = 0;
2696 
2697  int idx = lock_params->outputDuration;
2698  NvencFrameData *frame_data = &ctx->frame_data_array[idx];
2699 
2701 
2702  if (avctx->flags & AV_CODEC_FLAG_COPY_OPAQUE) {
2706  }
2707 
2709 
2710  return res;
2711 }
2712 
2714 {
2715  NvencContext *ctx = avctx->priv_data;
2716  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
2717  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
2718 
2719  NV_ENC_LOCK_BITSTREAM lock_params = { 0 };
2720  NVENCSTATUS nv_status;
2721  int res = 0;
2722 
2723  enum AVPictureType pict_type;
2724 
2725  lock_params.version = NV_ENC_LOCK_BITSTREAM_VER;
2726 
2727  lock_params.doNotWait = 0;
2728  lock_params.outputBitstream = tmpoutsurf->output_surface;
2729 
2730  nv_status = p_nvenc->nvEncLockBitstream(ctx->nvencoder, &lock_params);
2731  if (nv_status != NV_ENC_SUCCESS) {
2732  res = nvenc_print_error(avctx, nv_status, "Failed locking bitstream buffer");
2733  goto error;
2734  }
2735 
2736  res = ff_get_encode_buffer(avctx, pkt, lock_params.bitstreamSizeInBytes, 0);
2737 
2738  if (res < 0) {
2739  p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2740  goto error;
2741  }
2742 
2743  memcpy(pkt->data, lock_params.bitstreamBufferPtr, lock_params.bitstreamSizeInBytes);
2744 
2745  nv_status = p_nvenc->nvEncUnlockBitstream(ctx->nvencoder, tmpoutsurf->output_surface);
2746  if (nv_status != NV_ENC_SUCCESS) {
2747  res = nvenc_print_error(avctx, nv_status, "Failed unlocking bitstream buffer, expect the gates of mordor to open");
2748  goto error;
2749  }
2750 
2751 
2752  if (avctx->pix_fmt == AV_PIX_FMT_CUDA || avctx->pix_fmt == AV_PIX_FMT_D3D11) {
2753  ctx->registered_frames[tmpoutsurf->reg_idx].mapped -= 1;
2754  if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped == 0) {
2755  nv_status = p_nvenc->nvEncUnmapInputResource(ctx->nvencoder, ctx->registered_frames[tmpoutsurf->reg_idx].in_map.mappedResource);
2756  if (nv_status != NV_ENC_SUCCESS) {
2757  res = nvenc_print_error(avctx, nv_status, "Failed unmapping input resource");
2758  goto error;
2759  }
2760  } else if (ctx->registered_frames[tmpoutsurf->reg_idx].mapped < 0) {
2761  res = AVERROR_BUG;
2762  goto error;
2763  }
2764 
2765  av_frame_unref(tmpoutsurf->in_ref);
2766 
2767  tmpoutsurf->input_surface = NULL;
2768  }
2769 
2770  switch (lock_params.pictureType) {
2771  case NV_ENC_PIC_TYPE_IDR:
2773  case NV_ENC_PIC_TYPE_I:
2774  pict_type = AV_PICTURE_TYPE_I;
2775  break;
2776  case NV_ENC_PIC_TYPE_P:
2777  pict_type = AV_PICTURE_TYPE_P;
2778  break;
2779  case NV_ENC_PIC_TYPE_B:
2780  pict_type = AV_PICTURE_TYPE_B;
2781  break;
2782  case NV_ENC_PIC_TYPE_BI:
2783  pict_type = AV_PICTURE_TYPE_BI;
2784  break;
2785  default:
2786  av_log(avctx, AV_LOG_ERROR, "Unknown picture type encountered, expect the output to be broken.\n");
2787  av_log(avctx, AV_LOG_ERROR, "Please report this error and include as much information on how to reproduce it as possible.\n");
2788  res = AVERROR_EXTERNAL;
2789  goto error;
2790  }
2791 
2793  (lock_params.frameAvgQP - 1) * FF_QP2LAMBDA, NULL, 0, pict_type);
2794 
2795  res = nvenc_set_timestamp(avctx, &lock_params, pkt);
2796  if (res < 0)
2797  goto error2;
2798 
2799  res = nvenc_retrieve_frame_data(avctx, &lock_params, pkt);
2800  if (res < 0)
2801  goto error2;
2802 
2803  return 0;
2804 
2805 error:
2806  timestamp_queue_dequeue(ctx->timestamp_list);
2807 
2808 error2:
2809  return res;
2810 }
2811 
2812 static int output_ready(AVCodecContext *avctx, int flush)
2813 {
2814  NvencContext *ctx = avctx->priv_data;
2815  int nb_ready, nb_pending;
2816 
2817  nb_ready = av_fifo_can_read(ctx->output_surface_ready_queue);
2818  nb_pending = av_fifo_can_read(ctx->output_surface_queue);
2819  if (flush)
2820  return nb_ready > 0;
2821  return (nb_ready > 0) && (nb_ready + nb_pending >= ctx->async_depth);
2822 }
2823 
2825 {
2826  NvencContext *ctx = avctx->priv_data;
2827  int sei_count = 0;
2828  int i, res;
2829 
2831  void *a53_data = NULL;
2832  size_t a53_size = 0;
2833 
2834  if (ff_alloc_a53_sei(frame, 0, &a53_data, &a53_size) < 0) {
2835  av_log(ctx, AV_LOG_ERROR, "Not enough memory for closed captions, skipping\n");
2836  }
2837 
2838  if (a53_data) {
2839  void *tmp = av_fast_realloc(ctx->sei_data,
2840  &ctx->sei_data_size,
2841  (sei_count + 1) * sizeof(*ctx->sei_data));
2842  if (!tmp) {
2843  av_free(a53_data);
2844  res = AVERROR(ENOMEM);
2845  goto error;
2846  } else {
2847  ctx->sei_data = tmp;
2848  ctx->sei_data[sei_count].payloadSize = (uint32_t)a53_size;
2849  ctx->sei_data[sei_count].payload = (uint8_t*)a53_data;
2850 
2851 #if CONFIG_AV1_NVENC_ENCODER
2852  if (avctx->codec->id == AV_CODEC_ID_AV1)
2853  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_ITUT_T35;
2854  else
2855 #endif
2856  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35;
2857 
2858  sei_count++;
2859  }
2860  }
2861  }
2862 
2864  void *tc_data = NULL;
2865  size_t tc_size = 0;
2866 
2867  if (ff_alloc_timecode_sei(frame, avctx->framerate, 0, &tc_data, &tc_size) < 0) {
2868  av_log(ctx, AV_LOG_ERROR, "Not enough memory for timecode sei, skipping\n");
2869  }
2870 
2871  if (tc_data) {
2872  void *tmp = av_fast_realloc(ctx->sei_data,
2873  &ctx->sei_data_size,
2874  (sei_count + 1) * sizeof(*ctx->sei_data));
2875  if (!tmp) {
2876  av_free(tc_data);
2877  res = AVERROR(ENOMEM);
2878  goto error;
2879  } else {
2880  ctx->sei_data = tmp;
2881  ctx->sei_data[sei_count].payloadSize = (uint32_t)tc_size;
2882  ctx->sei_data[sei_count].payload = (uint8_t*)tc_data;
2883 
2884 #if CONFIG_AV1_NVENC_ENCODER
2885  if (avctx->codec->id == AV_CODEC_ID_AV1)
2886  ctx->sei_data[sei_count].payloadType = AV1_METADATA_TYPE_TIMECODE;
2887  else
2888 #endif
2889  ctx->sei_data[sei_count].payloadType = SEI_TYPE_TIME_CODE;
2890 
2891  sei_count++;
2892  }
2893  }
2894  }
2895 
2896  if (!ctx->udu_sei)
2897  return sei_count;
2898 
2899  for (i = 0; i < frame->nb_side_data; i++) {
2900  AVFrameSideData *side_data = frame->side_data[i];
2901  void *tmp;
2902 
2903  if (side_data->type != AV_FRAME_DATA_SEI_UNREGISTERED)
2904  continue;
2905 
2906  tmp = av_fast_realloc(ctx->sei_data,
2907  &ctx->sei_data_size,
2908  (sei_count + 1) * sizeof(*ctx->sei_data));
2909  if (!tmp) {
2910  res = AVERROR(ENOMEM);
2911  goto error;
2912  } else {
2913  ctx->sei_data = tmp;
2914  ctx->sei_data[sei_count].payloadSize = side_data->size;
2915  ctx->sei_data[sei_count].payloadType = SEI_TYPE_USER_DATA_UNREGISTERED;
2916  ctx->sei_data[sei_count].payload = av_memdup(side_data->data, side_data->size);
2917 
2918  if (!ctx->sei_data[sei_count].payload) {
2919  res = AVERROR(ENOMEM);
2920  goto error;
2921  }
2922 
2923  sei_count++;
2924  }
2925  }
2926 
2927  return sei_count;
2928 
2929 error:
2930  for (i = 0; i < sei_count; i++)
2931  av_freep(&(ctx->sei_data[i].payload));
2932 
2933  return res;
2934 }
2935 
2936 static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
2937 {
2938  NvencContext *ctx = avctx->priv_data;
2939  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &ctx->nvenc_dload_funcs.nvenc_funcs;
2940  NVENCSTATUS ret;
2941 
2942  NV_ENC_RECONFIGURE_PARAMS params = { 0 };
2943  int needs_reconfig = 0;
2944  int needs_encode_config = 0;
2945  int reconfig_bitrate = 0, reconfig_dar = 0;
2946  int dw, dh;
2947 
2948  params.version = NV_ENC_RECONFIGURE_PARAMS_VER;
2949  params.reInitEncodeParams = ctx->init_encode_params;
2950 
2951  compute_dar(avctx, &dw, &dh);
2952  if (dw != ctx->init_encode_params.darWidth || dh != ctx->init_encode_params.darHeight) {
2953  av_log(avctx, AV_LOG_VERBOSE,
2954  "aspect ratio change (DAR): %d:%d -> %d:%d\n",
2955  ctx->init_encode_params.darWidth,
2956  ctx->init_encode_params.darHeight, dw, dh);
2957 
2958  params.reInitEncodeParams.darHeight = dh;
2959  params.reInitEncodeParams.darWidth = dw;
2960 
2961  needs_reconfig = 1;
2962  reconfig_dar = 1;
2963  }
2964 
2965  if (ctx->rc != NV_ENC_PARAMS_RC_CONSTQP && ctx->support_dyn_bitrate) {
2966  if (avctx->bit_rate > 0 && params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate != avctx->bit_rate) {
2967  av_log(avctx, AV_LOG_VERBOSE,
2968  "avg bitrate change: %d -> %d\n",
2969  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate,
2970  (uint32_t)avctx->bit_rate);
2971 
2972  params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate = avctx->bit_rate;
2973  reconfig_bitrate = 1;
2974  }
2975 
2976  if (avctx->rc_max_rate > 0 && ctx->encode_config.rcParams.maxBitRate != avctx->rc_max_rate) {
2977  av_log(avctx, AV_LOG_VERBOSE,
2978  "max bitrate change: %d -> %d\n",
2979  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate,
2980  (uint32_t)avctx->rc_max_rate);
2981 
2982  params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate = avctx->rc_max_rate;
2983  reconfig_bitrate = 1;
2984  }
2985 
2986  if (avctx->rc_buffer_size > 0 && ctx->encode_config.rcParams.vbvBufferSize != avctx->rc_buffer_size) {
2987  av_log(avctx, AV_LOG_VERBOSE,
2988  "vbv buffer size change: %d -> %d\n",
2989  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize,
2990  avctx->rc_buffer_size);
2991 
2992  params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize = avctx->rc_buffer_size;
2993  reconfig_bitrate = 1;
2994  }
2995 
2996  if (reconfig_bitrate) {
2997  params.resetEncoder = 1;
2998  params.forceIDR = 1;
2999 
3000  needs_encode_config = 1;
3001  needs_reconfig = 1;
3002  }
3003  }
3004 
3005  if (!needs_encode_config)
3006  params.reInitEncodeParams.encodeConfig = NULL;
3007 
3008  if (needs_reconfig) {
3009  ret = p_nvenc->nvEncReconfigureEncoder(ctx->nvencoder, &params);
3010  if (ret != NV_ENC_SUCCESS) {
3011  nvenc_print_error(avctx, ret, "failed to reconfigure nvenc");
3012  } else {
3013  if (reconfig_dar) {
3014  ctx->init_encode_params.darHeight = dh;
3015  ctx->init_encode_params.darWidth = dw;
3016  }
3017 
3018  if (reconfig_bitrate) {
3019  ctx->encode_config.rcParams.averageBitRate = params.reInitEncodeParams.encodeConfig->rcParams.averageBitRate;
3020  ctx->encode_config.rcParams.maxBitRate = params.reInitEncodeParams.encodeConfig->rcParams.maxBitRate;
3021  ctx->encode_config.rcParams.vbvBufferSize = params.reInitEncodeParams.encodeConfig->rcParams.vbvBufferSize;
3022  }
3023 
3024  }
3025  }
3026 }
3027 
3028 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3029 static int nvenc_set_mastering_display_data(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *pic_params,
3030  MASTERING_DISPLAY_INFO *mastering_disp_info, CONTENT_LIGHT_LEVEL *content_light_level)
3031 {
3032  NvencContext *ctx = avctx->priv_data;
3033 
3034  if (ctx->mdm || ctx->cll) {
3037  const int chroma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 16 : 50000;
3038  const int max_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 8 : 10000;
3039  const int min_luma_den = (avctx->codec->id == AV_CODEC_ID_AV1) ? 1 << 14 : 10000;
3040 
3041  if (!sd_mdm)
3042  sd_mdm = av_frame_side_data_get(avctx->decoded_side_data,
3043  avctx->nb_decoded_side_data,
3045  if (!sd_cll)
3046  sd_cll = av_frame_side_data_get(avctx->decoded_side_data,
3047  avctx->nb_decoded_side_data,
3049 
3050  if (sd_mdm) {
3052 
3053  mastering_disp_info->r.x = av_rescale(mdm->display_primaries[0][0].num, chroma_den,
3054  mdm->display_primaries[0][0].den);
3055  mastering_disp_info->r.y = av_rescale(mdm->display_primaries[0][1].num, chroma_den,
3056  mdm->display_primaries[0][1].den);
3057  mastering_disp_info->g.x = av_rescale(mdm->display_primaries[1][0].num, chroma_den,
3058  mdm->display_primaries[1][0].den);
3059  mastering_disp_info->g.y = av_rescale(mdm->display_primaries[1][1].num, chroma_den,
3060  mdm->display_primaries[1][1].den);
3061  mastering_disp_info->b.x = av_rescale(mdm->display_primaries[2][0].num, chroma_den,
3062  mdm->display_primaries[2][0].den);
3063  mastering_disp_info->b.y = av_rescale(mdm->display_primaries[2][1].num, chroma_den,
3064  mdm->display_primaries[2][1].den);
3065  mastering_disp_info->whitePoint.x = av_rescale(mdm->white_point[0].num, chroma_den,
3066  mdm->white_point[0].den);
3067  mastering_disp_info->whitePoint.y = av_rescale(mdm->white_point[1].num, chroma_den,
3068  mdm->white_point[1].den);
3069  mastering_disp_info->maxLuma = av_rescale(mdm->max_luminance.num, max_luma_den,
3070  mdm->max_luminance.den);
3071  mastering_disp_info->minLuma = av_rescale(mdm->min_luminance.num, min_luma_den,
3072  mdm->min_luminance.den);
3073 
3074  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3075  pic_params->codecPicParams.hevcPicParams.pMasteringDisplay = mastering_disp_info;
3076  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3077  pic_params->codecPicParams.av1PicParams.pMasteringDisplay = mastering_disp_info;
3078  else
3079  return AVERROR_BUG;
3080  }
3081  if (sd_cll) {
3082  const AVContentLightMetadata *cll = (AVContentLightMetadata *)sd_cll->data;
3083 
3084  content_light_level->maxContentLightLevel = cll->MaxCLL;
3085  content_light_level->maxPicAverageLightLevel = cll->MaxFALL;
3086 
3087  if (avctx->codec->id == AV_CODEC_ID_HEVC)
3088  pic_params->codecPicParams.hevcPicParams.pMaxCll = content_light_level;
3089  else if (avctx->codec->id == AV_CODEC_ID_AV1)
3090  pic_params->codecPicParams.av1PicParams.pMaxCll = content_light_level;
3091  else
3092  return AVERROR_BUG;
3093  }
3094  }
3095 
3096  return 0;
3097 }
3098 #endif
3099 
3100 static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
3101 {
3102  NVENCSTATUS nv_status;
3103  NvencSurface *tmp_out_surf, *in_surf;
3104  int res, res2;
3105  int sei_count = 0;
3106  int i;
3107 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3108  MASTERING_DISPLAY_INFO mastering_disp_info = { 0 };
3109  CONTENT_LIGHT_LEVEL content_light_level = { 0 };
3110 #endif
3111 #ifdef NVENC_HAVE_MVHEVC
3112  HEVC_3D_REFERENCE_DISPLAY_INFO ref_disp_info = { 0 };
3113 #endif
3114 
3115  NvencContext *ctx = avctx->priv_data;
3116  NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs;
3117  NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs;
3118 
3119  NV_ENC_PIC_PARAMS pic_params = { 0 };
3120  pic_params.version = NV_ENC_PIC_PARAMS_VER;
3121 
3122  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3123  return AVERROR(EINVAL);
3124 
3125  if (frame && frame->buf[0]) {
3126  in_surf = get_free_frame(ctx);
3127  if (!in_surf)
3128  return AVERROR(EAGAIN);
3129 
3130  res = nvenc_push_context(avctx);
3131  if (res < 0)
3132  return res;
3133 
3134  reconfig_encoder(avctx, frame);
3135 
3136  res = nvenc_upload_frame(avctx, frame, in_surf);
3137 
3138  res2 = nvenc_pop_context(avctx);
3139  if (res2 < 0)
3140  return res2;
3141 
3142  if (res)
3143  return res;
3144 
3145  pic_params.inputBuffer = in_surf->input_surface;
3146  pic_params.bufferFmt = in_surf->format;
3147  pic_params.inputWidth = in_surf->width;
3148  pic_params.inputHeight = in_surf->height;
3149  pic_params.inputPitch = in_surf->pitch;
3150  pic_params.outputBitstream = in_surf->output_surface;
3151 
3152  if (avctx->flags & AV_CODEC_FLAG_INTERLACED_DCT) {
3153  if (frame->flags & AV_FRAME_FLAG_TOP_FIELD_FIRST)
3154  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_TOP_BOTTOM;
3155  else
3156  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FIELD_BOTTOM_TOP;
3157  } else {
3158  pic_params.pictureStruct = NV_ENC_PIC_STRUCT_FRAME;
3159  }
3160 
3161  if (ctx->forced_idr >= 0 && frame->pict_type == AV_PICTURE_TYPE_I) {
3162  pic_params.encodePicFlags =
3163  ctx->forced_idr ? NV_ENC_PIC_FLAG_FORCEIDR : NV_ENC_PIC_FLAG_FORCEINTRA;
3164  } else {
3165  pic_params.encodePicFlags = 0;
3166  }
3167 
3168  pic_params.frameIdx = ctx->frame_idx_counter++;
3169  pic_params.inputTimeStamp = frame->pts;
3170 
3171  if (ctx->extra_sei) {
3172  res = prepare_sei_data_array(avctx, frame);
3173  if (res < 0)
3174  return res;
3175  sei_count = res;
3176  }
3177 
3178 #ifdef NVENC_HAVE_HEVC_AND_AV1_MASTERING_METADATA
3179  res = nvenc_set_mastering_display_data(avctx, frame, &pic_params, &mastering_disp_info, &content_light_level);
3180  if (res < 0)
3181  return res;
3182 #endif
3183 
3184 #ifdef NVENC_HAVE_MVHEVC
3185  if (ctx->multiview) {
3188 
3189  if (sd_view_id)
3190  ctx->next_view_id = *(int*)sd_view_id->data;
3191 
3192  pic_params.codecPicParams.hevcPicParams.viewId = ctx->next_view_id;
3193 
3194  if (sd_tdrdi) {
3196 
3197  ref_disp_info.refViewingDistanceFlag = tdrdi->ref_viewing_distance_flag;
3198  ref_disp_info.precRefViewingDist = tdrdi->prec_ref_viewing_dist;
3199  ref_disp_info.precRefDisplayWidth = tdrdi->prec_ref_display_width;
3200 
3201  ref_disp_info.numRefDisplaysMinus1 = tdrdi->num_ref_displays - 1;
3202 
3203  for (i = 0; i < tdrdi->num_ref_displays &&
3204  i < FF_ARRAY_ELEMS(ref_disp_info.leftViewId); i++) {
3205  const AV3DReferenceDisplay *display = av_tdrdi_get_display(tdrdi, i);
3206  ref_disp_info.leftViewId[i] = display->left_view_id;
3207  ref_disp_info.rightViewId[i] = display->right_view_id;
3208  ref_disp_info.exponentRefDisplayWidth[i] = display->exponent_ref_display_width;
3209  ref_disp_info.mantissaRefDisplayWidth[i] = display->mantissa_ref_display_width;
3210  ref_disp_info.exponentRefViewingDistance[i] = display->exponent_ref_viewing_distance;
3211  ref_disp_info.mantissaRefViewingDistance[i] = display->mantissa_ref_viewing_distance;
3212  ref_disp_info.additionalShiftPresentFlag[i] = display->additional_shift_present_flag;
3213  ref_disp_info.numSampleShiftPlus512[i] = display->num_sample_shift + 512;
3214  }
3215 
3216  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3217  ctx->display_sei_sent = 1;
3218  } else if (!ctx->display_sei_sent) {
3219  ref_disp_info.precRefDisplayWidth = 31;
3220  ref_disp_info.leftViewId[0] = 0;
3221  ref_disp_info.rightViewId[0] = 1;
3222 
3223  pic_params.codecPicParams.hevcPicParams.p3DReferenceDisplayInfo = &ref_disp_info;
3224  ctx->display_sei_sent = 1;
3225  }
3226 
3227  ctx->next_view_id = !ctx->next_view_id;
3228  }
3229 #endif
3230 
3231  res = nvenc_store_frame_data(avctx, &pic_params, frame);
3232  if (res < 0)
3233  return res;
3234 
3235  nvenc_codec_specific_pic_params(avctx, frame, &pic_params, ctx->sei_data, sei_count);
3236  } else {
3237  pic_params.encodePicFlags = NV_ENC_PIC_FLAG_EOS;
3238  }
3239 
3240  res = nvenc_push_context(avctx);
3241  if (res < 0)
3242  return res;
3243 
3244  nv_status = p_nvenc->nvEncEncodePicture(ctx->nvencoder, &pic_params);
3245 
3246  for (i = 0; i < sei_count; i++)
3247  av_freep(&(ctx->sei_data[i].payload));
3248 
3249  res = nvenc_pop_context(avctx);
3250  if (res < 0)
3251  return res;
3252 
3253  if (nv_status != NV_ENC_SUCCESS &&
3254  nv_status != NV_ENC_ERR_NEED_MORE_INPUT)
3255  return nvenc_print_error(avctx, nv_status, "EncodePicture failed!");
3256 
3257  if (frame && frame->buf[0]) {
3258  av_fifo_write(ctx->output_surface_queue, &in_surf, 1);
3259 
3261  timestamp_queue_enqueue(ctx->timestamp_list, frame->pts);
3262  }
3263 
3264  /* all the pending buffers are now ready for output */
3265  if (nv_status == NV_ENC_SUCCESS) {
3266  while (av_fifo_read(ctx->output_surface_queue, &tmp_out_surf, 1) >= 0)
3267  av_fifo_write(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3268  }
3269 
3270  return 0;
3271 }
3272 
3274 {
3275  NvencSurface *tmp_out_surf;
3276  int res, res2;
3277 
3278  NvencContext *ctx = avctx->priv_data;
3279 
3280  AVFrame *frame = ctx->frame;
3281 
3282  if ((!ctx->cu_context && !ctx->d3d11_device) || !ctx->nvencoder)
3283  return AVERROR(EINVAL);
3284 
3285  if (!frame->buf[0]) {
3286  res = ff_encode_get_frame(avctx, frame);
3287  if (res < 0 && res != AVERROR_EOF)
3288  return res;
3289  }
3290 
3291  res = nvenc_send_frame(avctx, frame);
3292  if (res < 0) {
3293  if (res != AVERROR(EAGAIN))
3294  return res;
3295  } else
3297 
3298  if (output_ready(avctx, avctx->internal->draining)) {
3299  av_fifo_read(ctx->output_surface_ready_queue, &tmp_out_surf, 1);
3300 
3301  res = nvenc_push_context(avctx);
3302  if (res < 0)
3303  return res;
3304 
3305  res = process_output_surface(avctx, pkt, tmp_out_surf);
3306 
3307  res2 = nvenc_pop_context(avctx);
3308  if (res2 < 0)
3309  return res2;
3310 
3311  if (res)
3312  return res;
3313 
3314  av_fifo_write(ctx->unused_surface_queue, &tmp_out_surf, 1);
3315  } else if (avctx->internal->draining) {
3316  return AVERROR_EOF;
3317  } else {
3318  return AVERROR(EAGAIN);
3319  }
3320 
3321  return 0;
3322 }
3323 
3325 {
3326  NvencContext *ctx = avctx->priv_data;
3327 
3328  nvenc_send_frame(avctx, NULL);
3329  av_fifo_reset2(ctx->timestamp_list);
3330  ctx->output_frame_num = 0;
3331  ctx->initial_delay_time = 0;
3332 }
ANY_DEVICE
@ ANY_DEVICE
Definition: nvenc.h:202
error
static void error(const char *err)
Definition: target_bsf_fuzzer.c:32
flags
const SwsFlags flags[]
Definition: swscale.c:61
AVHWDeviceContext::hwctx
void * hwctx
The format-specific data, allocated and freed by libavutil along with this context.
Definition: hwcontext.h:86
ff_alloc_a53_sei
int ff_alloc_a53_sei(const AVFrame *frame, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for A53 side data and allocate and fill SEI message with A53 info.
Definition: atsc_a53.c:26
AV_LOG_WARNING
#define AV_LOG_WARNING
Something somehow does not look correct.
Definition: log.h:216
PRESET_ALIAS
#define PRESET_ALIAS(alias, name,...)
Definition: nvenc.c:206
AV_PIX_FMT_CUDA
@ AV_PIX_FMT_CUDA
HW acceleration through CUDA.
Definition: pixfmt.h:260
AV3DReferenceDisplay::num_sample_shift
int16_t num_sample_shift
The recommended additional horizontal shift for a stereo pair corresponding to the n-th reference bas...
Definition: tdrdi.h:141
AVMasteringDisplayMetadata::max_luminance
AVRational max_luminance
Max luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:57
AVPixelFormat
AVPixelFormat
Pixel format.
Definition: pixfmt.h:71
name
it s the only field you need to keep assuming you have a context There is some magic you don t need to care about around this just let it vf default minimum maximum flags name is the option name
Definition: writing_filters.txt:88
GUIDTuple::guid
const GUID guid
Definition: nvenc.c:202
level
uint8_t level
Definition: svq3.c:208
av_clip
#define av_clip
Definition: common.h:100
AVERROR
Filter the word “frame” indicates either a video frame or a group of audio as stored in an AVFrame structure Format for each input and each output the list of supported formats For video that means pixel format For audio that means channel sample they are references to shared objects When the negotiation mechanism computes the intersection of the formats supported at each end of a all references to both lists are replaced with a reference to the intersection And when a single format is eventually chosen for a link amongst the remaining all references to the list are updated That means that if a filter requires that its input and output have the same format amongst a supported all it has to do is use a reference to the same list of formats query_formats can leave some formats unset and return AVERROR(EAGAIN) to cause the negotiation mechanism toagain later. That can be used by filters with complex requirements to use the format negotiated on one link to set the formats supported on another. Frame references ownership and permissions
NV_ENC_H264_PROFILE_MAIN
@ NV_ENC_H264_PROFILE_MAIN
Definition: nvenc.h:169
AVCodecContext::colorspace
enum AVColorSpace colorspace
YUV colorspace type.
Definition: avcodec.h:659
AVCodecContext::decoded_side_data
AVFrameSideData ** decoded_side_data
Array containing static side data, such as HDR10 CLL / MDCV structures.
Definition: avcodec.h:1924
av_frame_get_side_data
AVFrameSideData * av_frame_get_side_data(const AVFrame *frame, enum AVFrameSideDataType type)
Definition: frame.c:657
AV_PIX_FMT_BGR32
#define AV_PIX_FMT_BGR32
Definition: pixfmt.h:511
GUIDTuple
Definition: nvenc.c:201
NONE
@ NONE
Definition: af_afade.c:60
GUIDTuple::flags
int flags
Definition: nvenc.c:203
av_pix_fmt_desc_get
const AVPixFmtDescriptor * av_pix_fmt_desc_get(enum AVPixelFormat pix_fmt)
Definition: pixdesc.c:3437
AVERROR_EOF
#define AVERROR_EOF
End of file.
Definition: error.h:57
AVBufferRef::data
uint8_t * data
The data buffer.
Definition: buffer.h:90
timecode_internal.h
AV_FRAME_DATA_A53_CC
@ AV_FRAME_DATA_A53_CC
ATSC A53 Part 4 Closed Captions.
Definition: frame.h:59
AV_PROFILE_H264_MAIN
#define AV_PROFILE_H264_MAIN
Definition: defs.h:112
nvenc_push_context
static int nvenc_push_context(AVCodecContext *avctx)
Definition: nvenc.c:385
AVMasteringDisplayMetadata::display_primaries
AVRational display_primaries[3][2]
CIE 1931 xy chromaticity coords of color primaries (r, g, b order).
Definition: mastering_display_metadata.h:42
AVHWFramesContext::format
enum AVPixelFormat format
The pixel format identifying the underlying HW surface type.
Definition: hwcontext.h:198
AVPictureType
AVPictureType
Definition: avutil.h:276
output_ready
static int output_ready(AVCodecContext *avctx, int flush)
Definition: nvenc.c:2812
NvencContext
Definition: nvenc.h:211
AV3DReferenceDisplaysInfo::prec_ref_viewing_dist
uint8_t prec_ref_viewing_dist
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_viewing_distance a...
Definition: tdrdi.h:72
AVCodecContext::codec_descriptor
const struct AVCodecDescriptor * codec_descriptor
AVCodecDescriptor.
Definition: avcodec.h:1704
int64_t
long long int64_t
Definition: coverity.c:34
NVENC_RGB_MODE_DISABLED
@ NVENC_RGB_MODE_DISABLED
Definition: nvenc.h:206
av_tdrdi_get_display
static av_always_inline AV3DReferenceDisplay * av_tdrdi_get_display(AV3DReferenceDisplaysInfo *tdrdi, unsigned int idx)
Definition: tdrdi.h:145
AV_PIX_FMT_YUV444P10MSB
#define AV_PIX_FMT_YUV444P10MSB
Definition: pixfmt.h:552
AV_FRAME_DATA_S12M_TIMECODE
@ AV_FRAME_DATA_S12M_TIMECODE
Timecode which conforms to SMPTE ST 12-1.
Definition: frame.h:152
AV_PROFILE_HEVC_MAIN
#define AV_PROFILE_HEVC_MAIN
Definition: defs.h:159
NvencSurface::in_ref
AVFrame * in_ref
Definition: nvenc.h:116
av_frame_free
void av_frame_free(AVFrame **frame)
Free the frame and any dynamically allocated objects in it, e.g.
Definition: frame.c:63
AVContentLightMetadata::MaxCLL
unsigned MaxCLL
Max content light level (cd/m^2).
Definition: mastering_display_metadata.h:111
nvenc_store_frame_data
static int nvenc_store_frame_data(AVCodecContext *avctx, NV_ENC_PIC_PARAMS *pic_params, const AVFrame *frame)
Definition: nvenc.c:2666
av_fifo_peek
int av_fifo_peek(const AVFifo *f, void *buf, size_t nb_elems, size_t offset)
Read data from a FIFO without modifying FIFO state.
Definition: fifo.c:255
AV3DReferenceDisplay
Data structure for single deference display information.
Definition: tdrdi.h:100
AVFrame
This structure describes decoded (raw) audio or video data.
Definition: frame.h:421
pixdesc.h
AVCodecContext::color_trc
enum AVColorTransferCharacteristic color_trc
Color Transfer Characteristic.
Definition: avcodec.h:652
nvenc_set_timestamp
static int nvenc_set_timestamp(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *params, AVPacket *pkt)
Definition: nvenc.c:2609
AVCOL_RANGE_JPEG
@ AVCOL_RANGE_JPEG
Full range content.
Definition: pixfmt.h:765
P1
#define P1
Definition: cavsdsp.c:37
internal.h
AVPacket::data
uint8_t * data
Definition: packet.h:552
nvenc_errors
static const struct @213 nvenc_errors[]
NVENC_TWO_PASSES
@ NVENC_TWO_PASSES
Definition: nvenc.h:195
encode.h
AVCodecContext::b_quant_offset
float b_quant_offset
qscale offset between IP and B-frames
Definition: avcodec.h:785
NvencFrameData
Definition: nvenc.h:126
reconfig_encoder
static void reconfig_encoder(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2936
AV_LOG_VERBOSE
#define AV_LOG_VERBOSE
Detailed information.
Definition: log.h:226
AVCOL_SPC_RGB
@ AVCOL_SPC_RGB
order of coefficients is actually GBR, also IEC 61966-2-1 (sRGB), YZX and ST 428-1
Definition: pixfmt.h:689
timestamp_queue_peek
static int64_t timestamp_queue_peek(AVFifo *queue, size_t index)
Definition: nvenc.c:2601
ff_nvenc_pix_fmts
enum AVPixelFormat ff_nvenc_pix_fmts[]
Definition: nvenc.c:60
set_constqp
static av_cold void set_constqp(AVCodecContext *avctx)
Definition: nvenc.c:874
NvencSurface
Definition: nvenc.h:113
AVPacket::duration
int64_t duration
Duration of this packet in AVStream->time_base units, 0 if unknown.
Definition: packet.h:570
mathematics.h
FFMAX
#define FFMAX(a, b)
Definition: macros.h:47
av_buffer_ref
AVBufferRef * av_buffer_ref(const AVBufferRef *buf)
Create a new reference to an AVBuffer.
Definition: buffer.c:103
nvenc_print_error
static int nvenc_print_error(AVCodecContext *avctx, NVENCSTATUS err, const char *error_string)
Definition: nvenc.c:181
BD
#define BD
AVERROR_UNKNOWN
#define AVERROR_UNKNOWN
Unknown error, typically from an external library.
Definition: error.h:73
AVCodecContext::qmax
int qmax
maximum quantizer
Definition: avcodec.h:1241
nverr
NVENCSTATUS nverr
Definition: nvenc.c:134
set_lossless
static av_cold void set_lossless(AVCodecContext *avctx)
Definition: nvenc.c:989
PRESET
#define PRESET(name,...)
Definition: nvenc.c:209
AV_PKT_FLAG_KEY
#define AV_PKT_FLAG_KEY
The packet contains a keyframe.
Definition: packet.h:607
ff_nvenc_encode_flush
av_cold void ff_nvenc_encode_flush(AVCodecContext *avctx)
Definition: nvenc.c:3324
AV_STEREO3D_UNSPEC
@ AV_STEREO3D_UNSPEC
Video is stereoscopic but the packing is unspecified.
Definition: stereo3d.h:143
av_malloc
#define av_malloc(s)
Definition: tableprint_vlc.h:31
AV_CODEC_FLAG_GLOBAL_HEADER
#define AV_CODEC_FLAG_GLOBAL_HEADER
Place global headers in extradata instead of every keyframe.
Definition: avcodec.h:318
ff_timecode_set_smpte
void ff_timecode_set_smpte(unsigned *drop, unsigned *hh, unsigned *mm, unsigned *ss, unsigned *ff, AVRational rate, uint32_t tcsmpte, int prevent_df, int skip_field)
Convert SMPTE 12M binary representation to sei info.
Definition: timecode_internal.c:33
nvenc.h
AV_FRAME_FLAG_TOP_FIELD_FIRST
#define AV_FRAME_FLAG_TOP_FIELD_FIRST
A flag to mark frames where the top field is displayed first if the content is interlaced.
Definition: frame.h:649
av_memdup
void * av_memdup(const void *p, size_t size)
Duplicate a buffer with av_malloc().
Definition: mem.c:304
AV_HWDEVICE_TYPE_CUDA
@ AV_HWDEVICE_TYPE_CUDA
Definition: hwcontext.h:30
AVContentLightMetadata
Content light level needed by to transmit HDR over HDMI (CTA-861.3).
Definition: mastering_display_metadata.h:107
compute_dar
static void compute_dar(AVCodecContext *avctx, int *dw, int *dh)
Definition: nvenc.c:1778
AV3DReferenceDisplaysInfo
This structure describes information about the reference display width(s) and reference viewing dista...
Definition: tdrdi.h:53
AVCodecContext::framerate
AVRational framerate
Definition: avcodec.h:551
AVCOL_SPC_BT470BG
@ AVCOL_SPC_BT470BG
also ITU-R BT601-6 625 / ITU-R BT1358 625 / ITU-R BT1700 625 PAL & SECAM / IEC 61966-2-4 xvYCC601
Definition: pixfmt.h:694
nvenc_upload_frame
static int nvenc_upload_frame(AVCodecContext *avctx, const AVFrame *frame, NvencSurface *nvenc_frame)
Definition: nvenc.c:2429
NvencDynLoadFunctions::nvenc_device_count
int nvenc_device_count
Definition: nvenc.h:140
AV_CODEC_FLAG_COPY_OPAQUE
#define AV_CODEC_FLAG_COPY_OPAQUE
Definition: avcodec.h:279
AVCodecContext::i_quant_factor
float i_quant_factor
qscale factor between P- and I-frames If > 0 then the last P-frame quantizer will be used (q = lastp_...
Definition: avcodec.h:794
set_vbr
static av_cold void set_vbr(AVCodecContext *avctx)
Definition: nvenc.c:912
nvenc_map_error
static int nvenc_map_error(NVENCSTATUS err, const char **desc)
Definition: nvenc.c:166
AVCodecContext::codec
const struct AVCodec * codec
Definition: avcodec.h:440
AVPacket::opaque_ref
AVBufferRef * opaque_ref
AVBufferRef for free use by the API user.
Definition: packet.h:588
nvenc_check_cap
static int nvenc_check_cap(AVCodecContext *avctx, NV_ENC_CAPS cap)
Definition: nvenc.c:470
presets
static const Preset presets[]
Definition: vf_pseudocolor.c:286
LIST_DEVICES
@ LIST_DEVICES
Definition: nvenc.h:201
fail
#define fail()
Definition: checkasm.h:197
av_fifo_write
int av_fifo_write(AVFifo *f, const void *buf, size_t nb_elems)
Write data into a FIFO.
Definition: fifo.c:188
AV_STEREO3D_2D
@ AV_STEREO3D_2D
Video is not stereoscopic (and metadata has to be there).
Definition: stereo3d.h:52
dummy
int dummy
Definition: motion.c:66
NvencSurface::format
NV_ENC_BUFFER_FORMAT format
Definition: nvenc.h:123
nvenc_setup_rate_control
static av_cold int nvenc_setup_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:1081
sei.h
AVCodecContext::refs
int refs
number of reference frames
Definition: avcodec.h:689
AV_HWDEVICE_TYPE_D3D11VA
@ AV_HWDEVICE_TYPE_D3D11VA
Definition: hwcontext.h:35
nvenc_map_preset
static void nvenc_map_preset(NvencContext *ctx)
Definition: nvenc.c:211
NV_ENC_HEVC_PROFILE_MAIN_10
@ NV_ENC_HEVC_PROFILE_MAIN_10
Definition: nvenc.h:182
AVCodecContext::flags
int flags
AV_CODEC_FLAG_*.
Definition: avcodec.h:488
val
static double val(void *priv, double ch)
Definition: aeval.c:77
nvenc_copy_frame
static int nvenc_copy_frame(AVCodecContext *avctx, NvencSurface *nv_surface, NV_ENC_LOCK_INPUT_BUFFER *lock_buffer_params, const AVFrame *frame)
Definition: nvenc.c:2311
AVERROR_BUFFER_TOO_SMALL
#define AVERROR_BUFFER_TOO_SMALL
Buffer too small.
Definition: error.h:53
hwcontext_cuda.h
av_image_fill_pointers
int av_image_fill_pointers(uint8_t *data[4], enum AVPixelFormat pix_fmt, int height, uint8_t *ptr, const int linesizes[4])
Fill plane data pointers for an image with pixel format pix_fmt and height height.
Definition: imgutils.c:145
NV_ENC_H264_PROFILE_HIGH
@ NV_ENC_H264_PROFILE_HIGH
Definition: nvenc.h:170
ss
#define ss(width, name, subs,...)
Definition: cbs_vp9.c:202
IS_GBRP
#define IS_GBRP(pix_fmt)
Definition: nvenc.c:129
AVCUDADeviceContext::cuda_ctx
CUcontext cuda_ctx
Definition: hwcontext_cuda.h:43
av_reduce
int av_reduce(int *dst_num, int *dst_den, int64_t num, int64_t den, int64_t max)
Reduce a fraction.
Definition: rational.c:35
nvenc_print_driver_requirement
static void nvenc_print_driver_requirement(AVCodecContext *avctx, int level)
Definition: nvenc.c:265
AVRational::num
int num
Numerator.
Definition: rational.h:59
NV_ENC_H264_PROFILE_HIGH_444P
@ NV_ENC_H264_PROFILE_HIGH_444P
Definition: nvenc.h:177
AV_CODEC_FLAG_INTERLACED_DCT
#define AV_CODEC_FLAG_INTERLACED_DCT
Use interlaced DCT.
Definition: avcodec.h:310
nvenc_check_capabilities
static int nvenc_check_capabilities(AVCodecContext *avctx)
Definition: nvenc.c:487
AVHWDeviceContext
This struct aggregates all the (hardware/vendor-specific) "high-level" state, i.e.
Definition: hwcontext.h:61
av_frame_alloc
AVFrame * av_frame_alloc(void)
Allocate an AVFrame and set its fields to default values.
Definition: frame.c:51
AVCodecContext::color_primaries
enum AVColorPrimaries color_primaries
Chromaticity coordinates of the source primaries.
Definition: avcodec.h:645
NVENC_LOSSLESS
@ NVENC_LOSSLESS
Definition: nvenc.h:193
AV_STEREO3D_FRAMESEQUENCE
@ AV_STEREO3D_FRAMESEQUENCE
Views are alternated temporally.
Definition: stereo3d.h:89
pkt
AVPacket * pkt
Definition: movenc.c:60
AV_LOG_ERROR
#define AV_LOG_ERROR
Something went wrong and cannot losslessly be recovered.
Definition: log.h:210
AVFrameSideData::size
size_t size
Definition: frame.h:279
FF_ARRAY_ELEMS
#define FF_ARRAY_ELEMS(a)
Definition: sinewin_tablegen.c:29
av_cold
#define av_cold
Definition: attributes.h:90
av_fifo_read
int av_fifo_read(AVFifo *f, void *buf, size_t nb_elems)
Read data from a FIFO.
Definition: fifo.c:240
AV_PIX_FMT_YUVJ422P
@ AV_PIX_FMT_YUVJ422P
planar YUV 4:2:2, 16bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV422P and setting col...
Definition: pixfmt.h:86
AVCodecContext::extradata_size
int extradata_size
Definition: avcodec.h:515
AVCodecContext::has_b_frames
int has_b_frames
Size of the frame reordering buffer in the decoder.
Definition: avcodec.h:697
ff_nvenc_encode_init
av_cold int ff_nvenc_encode_init(AVCodecContext *avctx)
Definition: nvenc.c:2248
av_fast_realloc
void * av_fast_realloc(void *ptr, unsigned int *size, size_t min_size)
Reallocate the given buffer if it is not large enough, otherwise do nothing.
Definition: mem.c:497
stereo3d.h
AVMasteringDisplayMetadata::white_point
AVRational white_point[2]
CIE 1931 xy chromaticity coords of white point.
Definition: mastering_display_metadata.h:47
AVCodecContext::global_quality
int global_quality
Global quality for codecs which cannot change it per frame.
Definition: avcodec.h:1217
AVD3D11VADeviceContext::device
ID3D11Device * device
Device used for texture creation and access.
Definition: hwcontext_d3d11va.h:56
AV_PIX_FMT_YUV444P16
#define AV_PIX_FMT_YUV444P16
Definition: pixfmt.h:550
AVFormatContext::flags
int flags
Flags modifying the (de)muxer behaviour.
Definition: avformat.h:1415
AVCodecContext::nb_decoded_side_data
int nb_decoded_side_data
Definition: avcodec.h:1925
AV_PIX_FMT_0BGR32
#define AV_PIX_FMT_0BGR32
Definition: pixfmt.h:514
pix_fmt
static enum AVPixelFormat pix_fmt
Definition: demux_decode.c:41
NvencDynLoadFunctions
Definition: nvenc.h:134
AV_PROFILE_H264_HIGH_10
#define AV_PROFILE_H264_HIGH_10
Definition: defs.h:115
NV_ENC_HEVC_PROFILE_REXT
@ NV_ENC_HEVC_PROFILE_REXT
Definition: nvenc.h:183
ctx
AVFormatContext * ctx
Definition: movenc.c:49
SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
@ SEI_TYPE_USER_DATA_REGISTERED_ITU_T_T35
Definition: sei.h:34
av_rescale_q
int64_t av_rescale_q(int64_t a, AVRational bq, AVRational cq)
Rescale a 64-bit integer by 2 rational numbers.
Definition: mathematics.c:142
AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
@ AV_FRAME_DATA_3D_REFERENCE_DISPLAYS
This side data contains information about the reference display width(s) and reference viewing distan...
Definition: frame.h:256
nvenc_setup_extradata
static av_cold int nvenc_setup_extradata(AVCodecContext *avctx)
Definition: nvenc.c:2129
timestamp_queue_enqueue
static void timestamp_queue_enqueue(AVFifo *queue, int64_t timestamp)
Definition: nvenc.c:2587
AV_PIX_FMT_YUV420P
@ AV_PIX_FMT_YUV420P
planar YUV 4:2:0, 12bpp, (1 Cr & Cb sample per 2x2 Y samples)
Definition: pixfmt.h:73
AVCodecContext::rc_max_rate
int64_t rc_max_rate
maximum bitrate
Definition: avcodec.h:1270
timestamp_queue_dequeue
static int64_t timestamp_queue_dequeue(AVFifo *queue)
Definition: nvenc.c:2592
AVPacket::opaque
void * opaque
for some private data of the user
Definition: packet.h:577
NvencDynLoadFunctions::nvenc_dl
NvencFunctions * nvenc_dl
Definition: nvenc.h:137
AVCPBProperties
This structure describes the bitrate properties of an encoded bitstream.
Definition: defs.h:279
AV_CODEC_ID_H264
@ AV_CODEC_ID_H264
Definition: codec_id.h:79
NvencSurface::pitch
int pitch
Definition: nvenc.h:120
AV_PIX_FMT_YUVJ444P
@ AV_PIX_FMT_YUVJ444P
planar YUV 4:4:4, 24bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV444P and setting col...
Definition: pixfmt.h:87
AV_PROFILE_H264_HIGH_422
#define AV_PROFILE_H264_HIGH_422
Definition: defs.h:118
NvencSurface::input_surface
NV_ENC_INPUT_PTR input_surface
Definition: nvenc.h:115
AVCodecDescriptor::props
int props
Codec properties, a combination of AV_CODEC_PROP_* flags.
Definition: codec_desc.h:54
if
if(ret)
Definition: filter_design.txt:179
AVCodecContext::rc_buffer_size
int rc_buffer_size
decoder bitstream buffer size
Definition: avcodec.h:1255
NVENC_CAP
#define NVENC_CAP
Definition: nvenc.c:50
AV_PIX_FMT_GBRP16
#define AV_PIX_FMT_GBRP16
Definition: pixfmt.h:559
IS_10BIT
#define IS_10BIT(pix_fmt)
Definition: nvenc.c:99
AV3DReferenceDisplaysInfo::ref_viewing_distance_flag
uint8_t ref_viewing_distance_flag
A flag to indicate the presence of reference viewing distance.
Definition: tdrdi.h:65
fabs
static __device__ float fabs(float a)
Definition: cuda_runtime.h:182
NULL
#define NULL
Definition: coverity.c:32
AVHWFramesContext::sw_format
enum AVPixelFormat sw_format
The pixel format identifying the actual data layout of the hardware frames.
Definition: hwcontext.h:211
IS_YUV422
#define IS_YUV422(pix_fmt)
Definition: nvenc.c:125
NvencSurface::reg_idx
int reg_idx
Definition: nvenc.h:117
AVCodecContext::color_range
enum AVColorRange color_range
MPEG vs JPEG YUV range.
Definition: avcodec.h:669
av_buffer_unref
void av_buffer_unref(AVBufferRef **buf)
Free a given reference and automatically free the buffer if there are no more references to it.
Definition: buffer.c:139
SEI_TYPE_TIME_CODE
@ SEI_TYPE_TIME_CODE
Definition: sei.h:95
AV_CODEC_ID_AV1
@ AV_CODEC_ID_AV1
Definition: codec_id.h:284
tmp
static uint8_t tmp[20]
Definition: aes_ctr.c:47
AVRational
Rational number (pair of numerator and denominator).
Definition: rational.h:58
AVCodecContext::internal
struct AVCodecInternal * internal
Private context used for internal data.
Definition: avcodec.h:466
AV_PIX_FMT_YUVJ420P
@ AV_PIX_FMT_YUVJ420P
planar YUV 4:2:0, 12bpp, full scale (JPEG), deprecated in favor of AV_PIX_FMT_YUV420P and setting col...
Definition: pixfmt.h:85
AVCodecContext::bit_rate
int64_t bit_rate
the average bitrate
Definition: avcodec.h:481
NVENC_LOWLATENCY
@ NVENC_LOWLATENCY
Definition: nvenc.h:192
ff_nvenc_encode_close
av_cold int ff_nvenc_encode_close(AVCodecContext *avctx)
Definition: nvenc.c:2163
FrameData::duration
int64_t duration
Definition: librav1e.c:60
AV_PICTURE_TYPE_I
@ AV_PICTURE_TYPE_I
Intra.
Definition: avutil.h:278
AV3DReferenceDisplay::exponent_ref_display_width
uint8_t exponent_ref_display_width
The exponent part of the reference display width of the n-th reference display.
Definition: tdrdi.h:114
P3
#define P3
Definition: dsp_template.c:801
av_fifo_can_read
size_t av_fifo_can_read(const AVFifo *f)
Definition: fifo.c:87
flush
void(* flush)(AVBSFContext *ctx)
Definition: dts2pts.c:370
NV_ENC_H264_PROFILE_BASELINE
@ NV_ENC_H264_PROFILE_BASELINE
Definition: nvenc.h:168
FrameData::frame_opaque
void * frame_opaque
Definition: librav1e.c:62
NvencDynLoadFunctions::cuda_dl
CudaFunctions * cuda_dl
Definition: nvenc.h:136
AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
@ AV_FRAME_DATA_MASTERING_DISPLAY_METADATA
Mastering display metadata associated with a video frame.
Definition: frame.h:120
nvenc_setup_h264_config
static av_cold int nvenc_setup_h264_config(AVCodecContext *avctx)
Definition: nvenc.c:1260
AV3DReferenceDisplaysInfo::prec_ref_display_width
uint8_t prec_ref_display_width
The exponent of the maximum allowable truncation error for {exponent,mantissa}_ref_display_width as g...
Definition: tdrdi.h:58
NV_ENC_HEVC_PROFILE_MAIN
@ NV_ENC_HEVC_PROFILE_MAIN
Definition: nvenc.h:181
AVPixFmtDescriptor::flags
uint64_t flags
Combination of AV_PIX_FMT_FLAG_...
Definition: pixdesc.h:94
AV_PROFILE_HEVC_MAIN_10
#define AV_PROFILE_HEVC_MAIN_10
Definition: defs.h:160
AV_PROFILE_HEVC_REXT
#define AV_PROFILE_HEVC_REXT
Definition: defs.h:162
index
int index
Definition: gxfenc.c:90
AV_FRAME_DATA_SEI_UNREGISTERED
@ AV_FRAME_DATA_SEI_UNREGISTERED
User data unregistered metadata associated with a video frame.
Definition: frame.h:178
AVCodecContext::time_base
AVRational time_base
This is the fundamental unit of time (in seconds) in terms of which frame timestamps are represented.
Definition: avcodec.h:535
av_fifo_reset2
void av_fifo_reset2(AVFifo *f)
Definition: fifo.c:280
AV_PIX_FMT_X2BGR10
#define AV_PIX_FMT_X2BGR10
Definition: pixfmt.h:612
AVCUDADeviceContext::stream
CUstream stream
Definition: hwcontext_cuda.h:44
desc
const char * desc
Definition: nvenc.c:136
nvenc_pop_context
static int nvenc_pop_context(AVCodecContext *avctx)
Definition: nvenc.c:396
HW_CONFIG_ENCODER_DEVICE
#define HW_CONFIG_ENCODER_DEVICE(format, device_type_)
Definition: hwconfig.h:95
AVFifo
Definition: fifo.c:35
AVCodecContext::gop_size
int gop_size
the number of pictures in a group of pictures, or 0 for intra_only
Definition: avcodec.h:1005
height
#define height
Definition: dsp.h:89
av_frame_ref
int av_frame_ref(AVFrame *dst, const AVFrame *src)
Set up a new reference to the data described by the source frame.
Definition: frame.c:276
nvenc_check_codec_support
static int nvenc_check_codec_support(AVCodecContext *avctx)
Definition: nvenc.c:434
AV_PIX_FMT_FLAG_RGB
#define AV_PIX_FMT_FLAG_RGB
The pixel format contains RGB-like data (as opposed to YUV/grayscale).
Definition: pixdesc.h:136
AV_CODEC_PROP_REORDER
#define AV_CODEC_PROP_REORDER
Codec supports frame reordering.
Definition: codec_desc.h:92
ff_nvenc_hw_configs
const AVCodecHWConfigInternal *const ff_nvenc_hw_configs[]
Definition: nvenc.c:89
MAX_REGISTERED_FRAMES
#define MAX_REGISTERED_FRAMES
Definition: nvenc.h:41
ff_alloc_timecode_sei
int ff_alloc_timecode_sei(const AVFrame *frame, AVRational rate, size_t prefix_len, void **data, size_t *sei_size)
Check AVFrame for S12M timecode side data and allocate and fill TC SEI message with timecode info.
Definition: utils.c:969
P6
#define P6
Definition: filter_template.c:407
for
for(k=2;k<=8;++k)
Definition: h264pred_template.c:424
nvenc_alloc_surface
static av_cold int nvenc_alloc_surface(AVCodecContext *avctx, int idx)
Definition: nvenc.c:2027
AV_NOPTS_VALUE
#define AV_NOPTS_VALUE
Undefined timestamp value.
Definition: avutil.h:247
AVFrameSideData::data
uint8_t * data
Definition: frame.h:278
nvenc_check_device
static av_cold int nvenc_check_device(AVCodecContext *avctx, int idx)
Definition: nvenc.c:683
nvenc_register_frame
static int nvenc_register_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2375
AVCodecHWConfigInternal
Definition: hwconfig.h:25
frame_data
FrameData * frame_data(AVFrame *frame)
Get our axiliary frame data attached to the frame, allocating it if needed.
Definition: ffmpeg.c:460
AV_PIX_FMT_NV16
@ AV_PIX_FMT_NV16
interleaved chroma YUV 4:2:2, 16bpp, (1 Cr & Cb sample per 2x1 Y samples)
Definition: pixfmt.h:198
ff_nvenc_receive_packet
int ff_nvenc_receive_packet(AVCodecContext *avctx, AVPacket *pkt)
Definition: nvenc.c:3273
AVPacket::dts
int64_t dts
Decompression timestamp in AVStream->time_base units; the time at which the packet is decompressed.
Definition: packet.h:551
AV_PIX_FMT_RGB32
#define AV_PIX_FMT_RGB32
Definition: pixfmt.h:509
NVENC_DEPRECATED_PRESET
@ NVENC_DEPRECATED_PRESET
Definition: nvenc.h:197
nvenc_override_rate_control
static void nvenc_override_rate_control(AVCodecContext *avctx)
Definition: nvenc.c:1003
AVERROR_EXTERNAL
#define AVERROR_EXTERNAL
Generic error in an external library.
Definition: error.h:59
AVPacket::flags
int flags
A combination of AV_PKT_FLAG values.
Definition: packet.h:558
AV_PIX_FMT_D3D11
@ AV_PIX_FMT_D3D11
Hardware surfaces for Direct3D11.
Definition: pixfmt.h:336
AV_PIX_FMT_P216
#define AV_PIX_FMT_P216
Definition: pixfmt.h:618
FrameData::frame_opaque_ref
AVBufferRef * frame_opaque_ref
Definition: librav1e.c:63
xf
#define xf(width, name, var, range_min, range_max, subs,...)
Definition: cbs_av1.c:621
AVCPBProperties::avg_bitrate
int64_t avg_bitrate
Average bitrate of the stream, in bits per second.
Definition: defs.h:294
AV_PIX_FMT_P210
#define AV_PIX_FMT_P210
Definition: pixfmt.h:614
get_free_frame
static NvencSurface * get_free_frame(NvencContext *ctx)
Definition: nvenc.c:2300
AV_LOG_INFO
#define AV_LOG_INFO
Standard information.
Definition: log.h:221
AVCodecContext::b_quant_factor
float b_quant_factor
qscale factor between IP and B-frames If > 0 then the last P-frame quantizer will be used (q= lastp_q...
Definition: avcodec.h:778
AV_FRAME_DATA_VIEW_ID
@ AV_FRAME_DATA_VIEW_ID
This side data must be associated with a video frame.
Definition: frame.h:245
AVCodec::id
enum AVCodecID id
Definition: codec.h:186
nvenc_open_session
static av_cold int nvenc_open_session(AVCodecContext *avctx)
Definition: nvenc.c:408
HW_CONFIG_ENCODER_FRAMES
#define HW_CONFIG_ENCODER_FRAMES(format, device_type_)
Definition: hwconfig.h:98
AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
@ AV_FRAME_DATA_CONTENT_LIGHT_LEVEL
Content light level (based on CTA-861.3).
Definition: frame.h:137
AV3DReferenceDisplay::right_view_id
uint16_t right_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:109
i
#define i(width, name, range_min, range_max)
Definition: cbs_h2645.c:256
AVPacket::pts
int64_t pts
Presentation timestamp in AVStream->time_base units; the time at which the decompressed packet will b...
Definition: packet.h:545
FAST
@ FAST
Definition: vf_guided.c:32
AVCodecContext::extradata
uint8_t * extradata
Out-of-band global headers that may be used by some codecs.
Definition: avcodec.h:514
process_output_surface
static int process_output_surface(AVCodecContext *avctx, AVPacket *pkt, NvencSurface *tmpoutsurf)
Definition: nvenc.c:2713
nvenc_load_libraries
static av_cold int nvenc_load_libraries(AVCodecContext *avctx)
Definition: nvenc.c:341
nvenc_recalc_surfaces
static av_cold int nvenc_recalc_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:1038
AVD3D11VADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_d3d11va.h:45
IS_RGB
#define IS_RGB(pix_fmt)
Definition: nvenc.c:110
AVCPBProperties::max_bitrate
int64_t max_bitrate
Maximum bitrate of the stream, in bits per second.
Definition: defs.h:284
AV_CODEC_ID_HEVC
@ AV_CODEC_ID_HEVC
Definition: codec_id.h:228
prepare_sei_data_array
static int prepare_sei_data_array(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:2824
AV_FRAME_DATA_STEREO3D
@ AV_FRAME_DATA_STEREO3D
Stereoscopic 3d metadata.
Definition: frame.h:64
FFMIN
#define FFMIN(a, b)
Definition: macros.h:49
av_frame_unref
void av_frame_unref(AVFrame *frame)
Unreference all the buffers referenced by frame and reset the frame fields.
Definition: frame.c:494
AV_PIX_FMT_X2RGB10
#define AV_PIX_FMT_X2RGB10
Definition: pixfmt.h:611
av_mallocz
void * av_mallocz(size_t size)
Allocate a memory block with alignment suitable for all memory accesses (including vectors if availab...
Definition: mem.c:256
NVENC_ONE_PASS
@ NVENC_ONE_PASS
Definition: nvenc.h:194
AV3DReferenceDisplay::mantissa_ref_display_width
uint8_t mantissa_ref_display_width
The mantissa part of the reference display width of the n-th reference display.
Definition: tdrdi.h:119
AVCodecContext::hw_device_ctx
AVBufferRef * hw_device_ctx
A reference to the AVHWDeviceContext describing the device which will be used by a hardware encoder/d...
Definition: avcodec.h:1475
AVMasteringDisplayMetadata
Mastering display metadata capable of representing the color volume of the display used to master the...
Definition: mastering_display_metadata.h:38
IS_YUV444
#define IS_YUV444(pix_fmt)
Definition: nvenc.c:117
P2
#define P2
Definition: cavsdsp.c:36
IS_CBR
#define IS_CBR(rc)
Definition: nvenc.c:53
av_rescale
int64_t av_rescale(int64_t a, int64_t b, int64_t c)
Rescale a 64-bit integer with rounding to nearest.
Definition: mathematics.c:129
AVCodecContext::height
int height
Definition: avcodec.h:592
AVCodecContext::pix_fmt
enum AVPixelFormat pix_fmt
Pixel format, see AV_PIX_FMT_xxx.
Definition: avcodec.h:631
CHECK_CU
#define CHECK_CU(x)
Definition: nvenc.c:48
nvenc_map_buffer_format
static NV_ENC_BUFFER_FORMAT nvenc_map_buffer_format(enum AVPixelFormat pix_fmt)
Definition: nvenc.c:1987
av_calloc
void * av_calloc(size_t nmemb, size_t size)
Definition: mem.c:264
AV_PIX_FMT_P016
#define AV_PIX_FMT_P016
Definition: pixfmt.h:602
AVCodecContext::hw_frames_ctx
AVBufferRef * hw_frames_ctx
A reference to the AVHWFramesContext describing the input (for encoding) or output (decoding) frames.
Definition: avcodec.h:1453
NvencSurface::width
int width
Definition: nvenc.h:118
AV1_METADATA_TYPE_ITUT_T35
@ AV1_METADATA_TYPE_ITUT_T35
Definition: av1.h:47
AVHWFramesContext
This struct describes a set or pool of "hardware" frames (i.e.
Definition: hwcontext.h:116
AVCUDADeviceContext
This struct is allocated as AVHWDeviceContext.hwctx.
Definition: hwcontext_cuda.h:42
AV_PROFILE_H264_HIGH_444_PREDICTIVE
#define AV_PROFILE_H264_HIGH_444_PREDICTIVE
Definition: defs.h:122
ret
ret
Definition: filter_design.txt:187
AV_LOG_FATAL
#define AV_LOG_FATAL
Something went wrong and recovery is not possible.
Definition: log.h:204
AVHWDeviceContext::type
enum AVHWDeviceType type
This field identifies the underlying API used for hardware access.
Definition: hwcontext.h:73
nvenc_setup_encoder
static av_cold int nvenc_setup_encoder(AVCodecContext *avctx)
Definition: nvenc.c:1811
AV_PIX_FMT_NV12
@ AV_PIX_FMT_NV12
planar YUV 4:2:0, 12bpp, 1 plane for Y and 1 plane for the UV components, which are interleaved (firs...
Definition: pixfmt.h:96
FFSWAP
#define FFSWAP(type, a, b)
Definition: macros.h:52
frame
these buffered frames must be flushed immediately if a new input produces new the filter must not call request_frame to get more It must just process the frame or queue it The task of requesting more frames is left to the filter s request_frame method or the application If a filter has several the filter must be ready for frames arriving randomly on any input any filter with several inputs will most likely require some kind of queuing mechanism It is perfectly acceptable to have a limited queue and to drop frames when the inputs are too unbalanced request_frame For filters that do not use the this method is called when a frame is wanted on an output For a it should directly call filter_frame on the corresponding output For a if there are queued frames already one of these frames should be pushed If the filter should request a frame on one of its repeatedly until at least one frame has been pushed Return or at least make progress towards producing a frame
Definition: filter_design.txt:265
averr
int averr
Definition: nvenc.c:135
AV_PIX_FMT_0RGB32
#define AV_PIX_FMT_0RGB32
Definition: pixfmt.h:513
AVHWFramesContext::device_ctx
AVHWDeviceContext * device_ctx
The parent AVHWDeviceContext.
Definition: hwcontext.h:135
AVCPBProperties::buffer_size
int64_t buffer_size
The size of the buffer to which the ratecontrol is applied, in bits.
Definition: defs.h:300
cuda_check.h
atsc_a53.h
AVStereo3D::type
enum AVStereo3DType type
How views are packed within the video.
Definition: stereo3d.h:207
AV_PROFILE_H264_BASELINE
#define AV_PROFILE_H264_BASELINE
Definition: defs.h:110
AV3DReferenceDisplay::mantissa_ref_viewing_distance
uint8_t mantissa_ref_viewing_distance
The mantissa part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:129
av_fifo_alloc2
AVFifo * av_fifo_alloc2(size_t nb_elems, size_t elem_size, unsigned int flags)
Allocate and initialize an AVFifo with a given element size.
Definition: fifo.c:47
AV_INPUT_BUFFER_PADDING_SIZE
#define AV_INPUT_BUFFER_PADDING_SIZE
Definition: defs.h:40
AV1_METADATA_TYPE_TIMECODE
@ AV1_METADATA_TYPE_TIMECODE
Definition: av1.h:48
AVCodecContext
main external API structure.
Definition: avcodec.h:431
AV_PROFILE_H264_HIGH
#define AV_PROFILE_H264_HIGH
Definition: defs.h:114
AV_PICTURE_TYPE_B
@ AV_PICTURE_TYPE_B
Bi-dir predicted.
Definition: avutil.h:280
ff_get_encode_buffer
int ff_get_encode_buffer(AVCodecContext *avctx, AVPacket *avpkt, int64_t size, int flags)
Get a buffer for a packet.
Definition: encode.c:106
NvencSurface::height
int height
Definition: nvenc.h:119
SEI_TYPE_USER_DATA_UNREGISTERED
@ SEI_TYPE_USER_DATA_UNREGISTERED
Definition: sei.h:35
av_image_copy2
static void av_image_copy2(uint8_t *const dst_data[4], const int dst_linesizes[4], uint8_t *const src_data[4], const int src_linesizes[4], enum AVPixelFormat pix_fmt, int width, int height)
Wrapper around av_image_copy() to workaround the limitation that the conversion from uint8_t * const ...
Definition: imgutils.h:184
AVCodecContext::qmin
int qmin
minimum quantizer
Definition: avcodec.h:1234
AVRational::den
int den
Denominator.
Definition: rational.h:60
AV_PIX_FMT_NONE
@ AV_PIX_FMT_NONE
Definition: pixfmt.h:72
AVCodecContext::profile
int profile
profile
Definition: avcodec.h:1618
nvenc_setup_surfaces
static av_cold int nvenc_setup_surfaces(AVCodecContext *avctx)
Definition: nvenc.c:2083
AV3DReferenceDisplay::additional_shift_present_flag
uint8_t additional_shift_present_flag
An array of flags to indicates that the information about additional horizontal shift of the left and...
Definition: tdrdi.h:135
AVCodecContext::i_quant_offset
float i_quant_offset
qscale offset between P and I-frames
Definition: avcodec.h:801
AVFrameSideData::type
enum AVFrameSideDataType type
Definition: frame.h:277
NvencSurface::output_surface
NV_ENC_OUTPUT_PTR output_surface
Definition: nvenc.h:122
AV_PROFILE_HEVC_MULTIVIEW_MAIN
#define AV_PROFILE_HEVC_MULTIVIEW_MAIN
Definition: defs.h:163
nvenc_find_free_reg_resource
static int nvenc_find_free_reg_resource(AVCodecContext *avctx)
Definition: nvenc.c:2341
nvenc_codec_specific_pic_params
static void nvenc_codec_specific_pic_params(AVCodecContext *avctx, const AVFrame *frame, NV_ENC_PIC_PARAMS *params, NV_ENC_SEI_PAYLOAD *sei_data, int sei_count)
Definition: nvenc.c:2536
AVMasteringDisplayMetadata::min_luminance
AVRational min_luminance
Min luminance of mastering display (cd/m^2).
Definition: mastering_display_metadata.h:52
AV_PIX_FMT_YUV444P
@ AV_PIX_FMT_YUV444P
planar YUV 4:4:4, 24bpp, (1 Cr & Cb sample per 1x1 Y samples)
Definition: pixfmt.h:78
P7
#define P7
Definition: filter_template.c:406
AV_PIX_FMT_P010
#define AV_PIX_FMT_P010
Definition: pixfmt.h:600
AVCodecInternal::draining
int draining
decoding: AVERROR_EOF has been returned from ff_decode_get_packet(); must not be used by decoders tha...
Definition: internal.h:139
AV_PIX_FMT_GBRP
@ AV_PIX_FMT_GBRP
planar GBR 4:4:4 24bpp
Definition: pixfmt.h:165
AV3DReferenceDisplaysInfo::num_ref_displays
uint8_t num_ref_displays
The number of reference displays that are signalled in this struct.
Definition: tdrdi.h:78
NvencDynLoadFunctions::nvenc_funcs
NV_ENCODE_API_FUNCTION_LIST nvenc_funcs
Definition: nvenc.h:139
AV_PICTURE_TYPE_P
@ AV_PICTURE_TYPE_P
Predicted.
Definition: avutil.h:279
mem.h
AVCodecContext::max_b_frames
int max_b_frames
maximum number of B-frames between non-B-frames Note: The output will be delayed by max_b_frames+1 re...
Definition: avcodec.h:769
ff_encode_get_frame
int ff_encode_get_frame(AVCodecContext *avctx, AVFrame *frame)
Called by encoders to get the next frame for encoding.
Definition: encode.c:205
packet_internal.h
AV3DReferenceDisplay::exponent_ref_viewing_distance
uint8_t exponent_ref_viewing_distance
Tthe exponent part of the reference viewing distance of the n-th reference display.
Definition: tdrdi.h:124
mastering_display_metadata.h
AVFrameSideData
Structure to hold side data for an AVFrame.
Definition: frame.h:276
AVPixFmtDescriptor
Descriptor that unambiguously describes how the bits of a pixel are stored in the up to 4 data planes...
Definition: pixdesc.h:69
P4
#define P4
Definition: filter_template.c:409
av_free
#define av_free(p)
Definition: tableprint_vlc.h:34
AVCodecContext::slices
int slices
Number of slices.
Definition: avcodec.h:1021
DEFAULT
#define DEFAULT
Definition: avdct.c:29
AVContentLightMetadata::MaxFALL
unsigned MaxFALL
Max average light level per frame (cd/m^2).
Definition: mastering_display_metadata.h:116
AVPacket
This structure stores compressed data.
Definition: packet.h:529
AVCodecContext::priv_data
void * priv_data
Definition: avcodec.h:458
av_freep
#define av_freep(p)
Definition: tableprint_vlc.h:35
AV_PICTURE_TYPE_BI
@ AV_PICTURE_TYPE_BI
BI type.
Definition: avutil.h:284
nvenc_setup_device
static av_cold int nvenc_setup_device(AVCodecContext *avctx)
Definition: nvenc.c:758
P5
#define P5
Definition: filter_template.c:408
av_frame_side_data_get
static const AVFrameSideData * av_frame_side_data_get(AVFrameSideData *const *sd, const int nb_sd, enum AVFrameSideDataType type)
Wrapper around av_frame_side_data_get_c() to workaround the limitation that for any type T the conver...
Definition: frame.h:1138
AVCodecContext::width
int width
picture width / height.
Definition: avcodec.h:592
imgutils.h
hwcontext.h
AVERROR_BUG
#define AVERROR_BUG
Internal bug, also see AVERROR_BUG2.
Definition: error.h:52
av_log
#define av_log(a,...)
Definition: tableprint_vlc.h:27
av_fifo_freep2
void av_fifo_freep2(AVFifo **f)
Free an AVFifo and reset pointer to NULL.
Definition: fifo.c:286
ff_side_data_set_encoder_stats
int ff_side_data_set_encoder_stats(AVPacket *pkt, int quality, int64_t *error, int error_count, int pict_type)
Definition: packet.c:612
AVERROR_EXIT
#define AVERROR_EXIT
Immediate exit was requested; the called function should not be restarted.
Definition: error.h:58
AV_PIX_FMT_GBRP10MSB
#define AV_PIX_FMT_GBRP10MSB
Definition: pixfmt.h:566
ff_encode_add_cpb_side_data
AVCPBProperties * ff_encode_add_cpb_side_data(AVCodecContext *avctx)
Add a CPB properties side data to an encoding context.
Definition: encode.c:875
AVStereo3D
Stereo 3D type: this structure describes how two videos are packed within a single video surface,...
Definition: stereo3d.h:203
nvenc_setup_codec_config
static av_cold int nvenc_setup_codec_config(AVCodecContext *avctx)
Definition: nvenc.c:1761
width
#define width
Definition: dsp.h:89
FF_QP2LAMBDA
#define FF_QP2LAMBDA
factor to convert from H.263 QP to lambda
Definition: avutil.h:226
AV3DReferenceDisplay::left_view_id
uint16_t left_view_id
The ViewId of the left view of a stereo pair corresponding to the n-th reference display.
Definition: tdrdi.h:104
AV_PROFILE_AV1_MAIN
#define AV_PROFILE_AV1_MAIN
Definition: defs.h:169
codec_desc.h
AVCodecContext::sample_aspect_ratio
AVRational sample_aspect_ratio
sample aspect ratio (0 if unknown) That is the width of a pixel divided by the height of the pixel.
Definition: avcodec.h:616
nvenc_setup_hevc_config
static av_cold int nvenc_setup_hevc_config(AVCodecContext *avctx)
Definition: nvenc.c:1451
RC_MODE_DEPRECATED
#define RC_MODE_DEPRECATED
Definition: nvenc.h:42
tdrdi.h
nvenc_send_frame
static int nvenc_send_frame(AVCodecContext *avctx, const AVFrame *frame)
Definition: nvenc.c:3100
av_get_pix_fmt_name
const char * av_get_pix_fmt_name(enum AVPixelFormat pix_fmt)
Return the short name for a pixel format, NULL in case pix_fmt is unknown.
Definition: pixdesc.c:3357
nvenc_retrieve_frame_data
static int nvenc_retrieve_frame_data(AVCodecContext *avctx, NV_ENC_LOCK_BITSTREAM *lock_params, AVPacket *pkt)
Definition: nvenc.c:2692